Re: [PATCH v4 7/8] dmaengine: dw-edma: add flags at struct dw_edma_chip

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Hi Frank,

I love your patch! Yet something to improve:

[auto build test ERROR on vkoul-dmaengine/next]
[also build test ERROR on helgaas-pci/next linus/master v5.17-rc7 next-20220309]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch]

url:    https://github.com/0day-ci/linux/commits/Frank-Li/Enable-designware-PCI-EP-EDMA-locally/20220310-051510
base:   https://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine.git next
config: csky-buildonly-randconfig-r004-20220309 (https://download.01.org/0day-ci/archive/20220310/202203100843.qzRV56ko-lkp@xxxxxxxxx/config)
compiler: csky-linux-gcc (GCC) 11.2.0
reproduce (this is a W=1 build):
        wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
        chmod +x ~/bin/make.cross
        # https://github.com/0day-ci/linux/commit/f7947d784b0fe089bdaef2fee8e57f84e390d3f2
        git remote add linux-review https://github.com/0day-ci/linux
        git fetch --no-tags linux-review Frank-Li/Enable-designware-PCI-EP-EDMA-locally/20220310-051510
        git checkout f7947d784b0fe089bdaef2fee8e57f84e390d3f2
        # save the config file to linux build tree
        mkdir build_dir
        COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.2.0 make.cross O=build_dir ARCH=csky SHELL=/bin/bash drivers/dma/dw-edma/

If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@xxxxxxxxx>

All errors (new ones prefixed by >>):

   drivers/dma/dw-edma/dw-edma-v0-core.c: In function 'dw_edma_v0_core_start':
>> drivers/dma/dw-edma/dw-edma-v0-core.c:427:25: error: implicit declaration of function 'SET_CH_64'; did you mean 'SET_CH_32'? [-Werror=implicit-function-declaration]
     427 |                         SET_CH_64(dw, chan->dir, chan->id, llp.reg,
         |                         ^~~~~~~~~
         |                         SET_CH_32
>> drivers/dma/dw-edma/dw-edma-v0-core.c:427:60: error: 'llp' undeclared (first use in this function)
     427 |                         SET_CH_64(dw, chan->dir, chan->id, llp.reg,
         |                                                            ^~~
   drivers/dma/dw-edma/dw-edma-v0-core.c:427:60: note: each undeclared identifier is reported only once for each function it appears in
   cc1: some warnings being treated as errors


vim +427 drivers/dma/dw-edma/dw-edma-v0-core.c

   359	
   360	void dw_edma_v0_core_start(struct dw_edma_chunk *chunk, bool first)
   361	{
   362		struct dw_edma_chan *chan = chunk->chan;
   363		struct dw_edma *dw = chan->dw;
   364		u32 tmp;
   365	
   366		dw_edma_v0_core_write_chunk(chunk);
   367	
   368		if (first) {
   369			/* Enable engine */
   370			SET_RW_32(dw, chan->dir, engine_en, BIT(0));
   371			if (dw->chip->mf == EDMA_MF_HDMA_COMPAT) {
   372				switch (chan->id) {
   373				case 0:
   374					SET_RW_COMPAT(dw, chan->dir, ch0_pwr_en,
   375						      BIT(0));
   376					break;
   377				case 1:
   378					SET_RW_COMPAT(dw, chan->dir, ch1_pwr_en,
   379						      BIT(0));
   380					break;
   381				case 2:
   382					SET_RW_COMPAT(dw, chan->dir, ch2_pwr_en,
   383						      BIT(0));
   384					break;
   385				case 3:
   386					SET_RW_COMPAT(dw, chan->dir, ch3_pwr_en,
   387						      BIT(0));
   388					break;
   389				case 4:
   390					SET_RW_COMPAT(dw, chan->dir, ch4_pwr_en,
   391						      BIT(0));
   392					break;
   393				case 5:
   394					SET_RW_COMPAT(dw, chan->dir, ch5_pwr_en,
   395						      BIT(0));
   396					break;
   397				case 6:
   398					SET_RW_COMPAT(dw, chan->dir, ch6_pwr_en,
   399						      BIT(0));
   400					break;
   401				case 7:
   402					SET_RW_COMPAT(dw, chan->dir, ch7_pwr_en,
   403						      BIT(0));
   404					break;
   405				}
   406			}
   407			/* Interrupt unmask - done, abort */
   408			tmp = GET_RW_32(dw, chan->dir, int_mask);
   409			tmp &= ~FIELD_PREP(EDMA_V0_DONE_INT_MASK, BIT(chan->id));
   410			tmp &= ~FIELD_PREP(EDMA_V0_ABORT_INT_MASK, BIT(chan->id));
   411			SET_RW_32(dw, chan->dir, int_mask, tmp);
   412			/* Linked list error */
   413			tmp = GET_RW_32(dw, chan->dir, linked_list_err_en);
   414			tmp |= FIELD_PREP(EDMA_V0_LINKED_LIST_ERR_MASK, BIT(chan->id));
   415			SET_RW_32(dw, chan->dir, linked_list_err_en, tmp);
   416			/* Channel control */
   417			SET_CH_32(dw, chan->dir, chan->id, ch_control1,
   418				  (DW_EDMA_V0_CCS | DW_EDMA_V0_LLE));
   419			/* Linked list */
   420			if ((chan->dw->chip->flags & DW_EDMA_CHIP_32BIT_DBI) ||
   421			    !IS_ENABLED(CONFIG_64BIT)) {
   422				SET_CH_32(dw, chan->dir, chan->id, llp.lsb,
   423					  lower_32_bits(chunk->ll_region.paddr));
   424				SET_CH_32(dw, chan->dir, chan->id, llp.msb,
   425					  upper_32_bits(chunk->ll_region.paddr));
   426			} else {
 > 427				SET_CH_64(dw, chan->dir, chan->id, llp.reg,
   428					  chunk->ll_region.paddr);
   429			}
   430		}
   431		/* Doorbell */
   432		SET_RW_32(dw, chan->dir, doorbell,
   433			  FIELD_PREP(EDMA_V0_DOORBELL_CH_MASK, chan->id));
   434	}
   435	

---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@xxxxxxxxxxxx



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