> -----Original Message----- > From: Tian, Kevin [mailto:kevin.tian@xxxxxxxxx] > Sent: 08 March 2022 06:31 > To: Shameerali Kolothum Thodi <shameerali.kolothum.thodi@xxxxxxxxxx>; > kvm@xxxxxxxxxxxxxxx; linux-kernel@xxxxxxxxxxxxxxx; > linux-crypto@xxxxxxxxxxxxxxx > Cc: linux-pci@xxxxxxxxxxxxxxx; alex.williamson@xxxxxxxxxx; jgg@xxxxxxxxxx; > cohuck@xxxxxxxxxx; mgurtovoy@xxxxxxxxxx; yishaih@xxxxxxxxxx; Linuxarm > <linuxarm@xxxxxxxxxx>; liulongfang <liulongfang@xxxxxxxxxx>; Zengtao (B) > <prime.zeng@xxxxxxxxxxxxx>; Jonathan Cameron > <jonathan.cameron@xxxxxxxxxx>; Wangzhou (B) <wangzhou1@xxxxxxxxxxxxx> > Subject: RE: [PATCH v8 7/9] crypto: hisilicon/qm: Set the VF QM state register > > > From: Shameer Kolothum <shameerali.kolothum.thodi@xxxxxxxxxx> > > Sent: Friday, March 4, 2022 7:01 AM > > > > From: Longfang Liu <liulongfang@xxxxxxxxxx> > > > > We use VF QM state register to record the status of the QM configuration > > state. This will be used in the ACC migration driver to determine whether > > we can safely save and restore the QM data. > > Can you say something about what QM is and how it is related to the VF state > to be migrated? It might be obvious to acc driver people but not so to to > others in vfio community like me. 😊 Ok, understand that. I will lift a description from the QM driver patch :). QM stands for Queue Management which is a generic IP used by ACC devices. It provides a general PCIe interface for the CPU and the ACC devices to share a group of queues. QM integrated into an accelerator provides queue management service. Queues can be assigned to PF and VFs, and queues can be controlled by unified mailboxes and doorbells. The QM driver(drivers/crypto/hisilicon/qm.c) provides generic interfaces to ACC drivers to manage the QM. I will add some of this in either this commit msg or in the actual file somewhere. Thanks, Shameer
