Document the PCIe DT bindings for SM8150 SoC. The PCIe IP is similar to the one used on SM8250. Cc: Lorenzo Pieralisi <lorenzo.pieralisi@xxxxxxx> Cc: Bjorn Andersson <bjorn.andersson@xxxxxxxxxx> Cc: Rob Herring <robh@xxxxxxxxxx> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@xxxxxxxxxx> --- Documentation/devicetree/bindings/pci/qcom,pcie.txt | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.txt b/Documentation/devicetree/bindings/pci/qcom,pcie.txt index a0ae024c2d0c..a023f97daf84 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie.txt +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.txt @@ -14,6 +14,7 @@ - "qcom,pcie-qcs404" for qcs404 - "qcom,pcie-sc8180x" for sc8180x - "qcom,pcie-sdm845" for sdm845 + - "qcom,pcie-sm8150" for sm8150 - "qcom,pcie-sm8250" for sm8250 - "qcom,pcie-ipq6018" for ipq6018 @@ -157,7 +158,7 @@ - "pipe" PIPE clock - clock-names: - Usage: required for sc8180x and sm8250 + Usage: required for sc8180x, sm8150 and sm8250 Value type: <stringlist> Definition: Should contain the following entries - "aux" Auxiliary clock @@ -246,7 +247,7 @@ - "ahb" AHB reset - reset-names: - Usage: required for sc8180x, sdm845 and sm8250 + Usage: required for sc8180x, sdm845, sm8150 and sm8250 Value type: <stringlist> Definition: Should contain the following entries - "pci" PCIe core reset -- 2.35.1
