On Thu, Feb 03, 2022 at 09:11:44PM +0000, Stephen Boyd wrote: > Quoting Dmitry Baryshkov (2021-12-18 06:02:20) > > After comparing upstream and downstream Qualcomm PCIe drivers, change > > the way the driver works with the pipe_clk_src multiplexing. > > > > The clock should be switched to using ref_clk (TCXO) as a parent before > > turning the PCIE_x_GDSC power domain off and can be switched to using > > PHY's pipe_clk after this power domain is turned on. > > > > Downstream driver uses regulators for the GDSC, so current approach also > > (incorrectly) uses them. However upstream driver uses power-domain and > > so GDSC is maintained using pm_runtime_foo() calls. Change order of > > operations to implement these requirements. > > Prasad, can you test/review this series? Waiting for testing/review and Bjorn/Andy ACKs. Lorenzo
