In subject, possibly: PCI: xilinx-cpm: Add Versal CPM5 Root Port support since you're adding support for a *device*, not for a *driver*. On Mon, Feb 07, 2022 at 09:42:50AM +0530, Bharat Kumar Gogada wrote: > Xilinx Versal Premium series has CPM5 block which supports Root port > functioning at Gen5 speed. > Xilinx Versal CPM5 has few changes with existing CPM block. > - CPM5 has dedicated register space for control and status registers. > - CPM5 legacy interrupt handling needs additional register bit > to enable and handle legacy interrupts. s/Root port/Root Port/ to be consistent. Add blank line between paragraphs. Bjorn
