On Fri, Feb 04, 2022 at 02:51:16PM +0000, Jonathan Cameron wrote: > On Thu, 3 Feb 2022 16:44:37 -0600 > Bjorn Helgaas <helgaas@xxxxxxxxxx> wrote: > > On Mon, Jan 31, 2022 at 11:19:46PM -0800, ira.weiny@xxxxxxxxx wrote: > > > + * pci_doe_create_doe_devices - Create auxiliary DOE devices for all DOE > > > + * mailboxes found > > > + * @pci_dev: The PCI device to scan for DOE mailboxes > > > + * > > > + * There is no coresponding destroy of these devices. This function associates > > > + * the DOE auxiliary devices created with the pci_dev passed in. That > > > + * association is device managed (devm_*) such that the DOE auxiliary device > > > + * lifetime is always greater than or equal to the lifetime of the pci_dev. > > > > This seems backwards. What does it mean if the DOE aux dev > > lifetime is *greater* than that of the pci_dev? Surely you can't > > access a PCI DOE Capability if the pci_dev is gone? > > I think the description is inaccurate - the end of life is the same > as that of the PCI driver binding to the pci_dev. It'll get cleared > up if that is unbound etc. I don't know much about devm, but I *think* the devm things get released by devres_release_all(), which is called by __device_release_driver() after it calls the bus or driver's .remove() method (pci_device_remove(), in this case). So in this case, I think the aux dev is created after the pci_dev and released after the PCI driver and the PCI core are done with the pci_dev. I assume some refcounting prevents the pci_dev from actually being deallocated until the aux dev is done with it. I'm not confident that this is a robust situation. > > > + * done later within the DOE initialization, but as it > > > + * potentially has other impacts keep it here when setting up > > > + * the IRQ's. > > > > s/IRQ's/IRQs/ > > > > "Potentially has other impacts" is too vague, and this doesn't > > explain why bus mastering should be enabled here rather than > > later. The device should not issue an MSI-X until DOE Interrupt > > Enable is set, so near there seems like a logical place. > > I can't remember what lead to that comment so hopefully moving to > just before the enable would be fine - if there was somewhere to do > it. I'm not sure there is as the IRQ enable is in the Auxilliary > Bus driver. If we pull the pci_alloc_irq_vectors() out of here into > the caller, then the pci_set_master() should go with it. I think pci_set_master() is tied to setting PCI_DOE_CTRL_INT_EN, not to pci_alloc_irq_vectors(). Bjorn
