On Tue, Feb 1, 2022 at 7:32 AM Ben Widawsky <ben.widawsky@xxxxxxxxx> wrote: > > On 22-01-23 16:31:24, Dan Williams wrote: > > While CXL memory targets will have their own memory target node, > > individual memory devices may be affinitized like other PCI devices. > > Emit that attribute for memdevs. > > > > Signed-off-by: Dan Williams <dan.j.williams@xxxxxxxxx> > > This brings up an interesting question. Are all devices in a region affinitized > to the same NUMA node? I think they must be - at which point, should this > attribute be a part of a region, rather than a device? > > > --- > > Documentation/ABI/testing/sysfs-bus-cxl | 9 +++++++++ > > drivers/cxl/core/memdev.c | 17 +++++++++++++++++ > > tools/testing/cxl/test/cxl.c | 1 + > > 3 files changed, 27 insertions(+) > > > > diff --git a/Documentation/ABI/testing/sysfs-bus-cxl b/Documentation/ABI/testing/sysfs-bus-cxl > > index 87c0e5e65322..0b51cfec0c66 100644 > > --- a/Documentation/ABI/testing/sysfs-bus-cxl > > +++ b/Documentation/ABI/testing/sysfs-bus-cxl > > @@ -34,6 +34,15 @@ Description: > > capability. Mandatory for CXL devices, see CXL 2.0 8.1.12.2 > > Memory Device PCIe Capabilities and Extended Capabilities. > > > > +What: /sys/bus/cxl/devices/memX/numa_node > > +Date: January, 2022 > > +KernelVersion: v5.18 > > +Contact: linux-cxl@xxxxxxxxxxxxxxx > > +Description: > > + (RO) If NUMA is enabled and the platform has affinitized the > > + host PCI device for this memory device, emit the CPU node > > + affinity for this device. > > + > > I think you'd want to say something about the device actively decoding. Perhaps > I'm mistaken though, can you affinitize without setting up HDM decoders for the > device? Missed replying to this. No, the memory decode is independent of the CPU to device affinity. This affinity is like the affinity of an NVME device i.e. the affinity of PCI.mmio to a CPU, not the resulting CXL.mem node of which there may be multiple for a single device.
