On Mon, 31 Jan 2022 16:34:40 -0800 Dan Williams <dan.j.williams@xxxxxxxxx> wrote: > In preparation for switch port enumeration while also preserving the > potential for multi-domain / multi-root CXL topologies. Introduce a > 'struct device' generic mechanism for retrieving a root CXL port, if one > is registered. Note that the only known multi-domain CXL configurations > are running the cxl_test unit test on a system that also publishes an > ACPI0017 device. > > With this in hand the nvdimm-bridge lookup can be with > device_find_child() instead of bus_find_device() + custom mocked lookup > infrastructure in cxl_test. > > The mechanism looks for a 2nd level port since the root level topology > is platform-firmware specific and the 2nd level down follows standard > PCIe topology expectations. The cxl_acpi 2nd level is associated with a > PCIe Root Port. > > Reported-by: Ben Widawsky <ben.widawsky@xxxxxxxxx> > Signed-off-by: Dan Williams <dan.j.williams@xxxxxxxxx> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@xxxxxxxxxx>
