On Fri, Jun 29, 2018 at 11:22:31AM +0200, Thomas Petazzoni wrote:
> +static void advk_sw_pci_bridge_init(struct advk_pcie *pcie)
> +{
> + struct pci_sw_bridge *bridge = &pcie->bridge;
> + /* Support interrupt A for MSI feature */
> + bridge->conf.intpin = PCIE_CORE_INT_A_ASSERT_ENABLE;
Only 3.5 years later, IIUC, this is the value you get when you read
PCI_INTERRUPT_PIN, so I think this should be PCI_INTERRUPT_INTA, not
PCIE_CORE_INT_A_ASSERT_ENABLE.
Readers expect to get the values defined in the PCI spec, i.e.,
PCI_INTERRUPT_UNKNOWN
PCI_INTERRUPT_INTA
PCI_INTERRUPT_INTB
PCI_INTERRUPT_INTC
PCI_INTERRUPT_INTD
Bjorn
