Re: PCIe payload bug

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On Thu, Sep 1, 2011 at 10:16 AM, Jesse Barnes <jbarnes@xxxxxxxxxxxxxxxx> wrote:
> Jon, can you take a look at this?  Looks like even the "safe" option
> causes problems... so either there's a difference in the way the
> payload is programmed even in the safe case, or just read/writing that
> reg on radeon causes trouble.
>
> https://bugzilla.kernel.org/show_bug.cgi?id=42162

The issue appears to be with setting MRRS to 0.  The Radeon HW doesn't
seem to like it, and I'm guessing other devices won't either.  Instead
of reverting the patch as a whole, I can rip out the MRRS setting code
(which I believe is the cause of all of the problems being seen).

Thanks,
Jon

> Thanks,
> --
> Jesse Barnes, Intel Open Source Technology Center
>
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