Re: [PATCH 0/7] PCI: Re-factor PCI's 'latency timer' setup

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Myron Stowe <myron.stowe@xxxxxxxxxx> wrote:

> The 'latency timer' of PCI devices, both Type 0 and Type 1,
> is setup in architecture-specific code [see: pcibios_set_master()].
> There are two approaches being taken by all the architectures - check
> if the 'latency timer' is currently set between 16 and 255 and if not
> bring it within bounds, or, do nothing (and then there is the
> gratuitously different parisc implementation).
> 
> There is nothing architecture-specific about PCI's 'latency timer' so
> this patch pulls the setup functionality up into the PCI core by
> creating a generic 'pcibios_set_master()' function using the 'weak'
> attribute which can be used by all architectures as a default which,
> if absolutely necessary, can then be over-ridden by architecture-
> pecific code.
> 
> With the generic 'pcibios_set_master()' function in place the series
> removes the now redundant function from the following architectures:
> frv, mips, mn10300, sh, and x86.  I believe that alpha, arm, and
> arch-v32 could also be removed and use the default but I was
> not comfortable with those architectures so any feedback there as to
> whether or not they should be included would be appreciated.

Acked-by: David Howells <dhowells@xxxxxxxxxx> [FRV/MN10300]
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