Hi Ben, url: https://github.com/0day-ci/linux/commits/Ben-Widawsky/Add-drivers-for-CXL-ports-and-mem-devices/20211120-080513 base: 53989fad1286e652ea3655ae3367ba698da8d2ff config: x86_64-randconfig-m001-20211118 (https://download.01.org/0day-ci/archive/20211126/202111260523.BAvGTRJR-lkp@xxxxxxxxx/config) compiler: gcc-9 (Debian 9.3.0-22) 9.3.0 If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp@xxxxxxxxx> Reported-by: Dan Carpenter <dan.carpenter@xxxxxxxxxx> smatch warnings: drivers/cxl/acpi.c:399 cxl_acpi_probe() error: uninitialized symbol 'root_port'. vim +/root_port +399 drivers/cxl/acpi.c 4812be97c015bd Dan Williams 2021-06-09 383 static int cxl_acpi_probe(struct platform_device *pdev) 4812be97c015bd Dan Williams 2021-06-09 384 { 3b94ce7b7bc1b4 Dan Williams 2021-06-09 385 int rc; 4812be97c015bd Dan Williams 2021-06-09 386 struct cxl_port *root_port; 4812be97c015bd Dan Williams 2021-06-09 387 struct device *host = &pdev->dev; 7d4b5ca2e2cb5d Dan Williams 2021-06-09 388 struct acpi_device *adev = ACPI_COMPANION(host); f4ce1f766f1ebf Dan Williams 2021-10-29 389 struct cxl_cfmws_context ctx; 4812be97c015bd Dan Williams 2021-06-09 390 6b4661f8037e4f Ben Widawsky 2021-11-19 391 rc = cxl_register_topology_host(host); 6b4661f8037e4f Ben Widawsky 2021-11-19 392 if (rc) 6b4661f8037e4f Ben Widawsky 2021-11-19 393 return rc; 6b4661f8037e4f Ben Widawsky 2021-11-19 394 6b4661f8037e4f Ben Widawsky 2021-11-19 395 rc = devm_add_action_or_reset(host, clear_topology_host, host); 6b4661f8037e4f Ben Widawsky 2021-11-19 396 if (rc) 6b4661f8037e4f Ben Widawsky 2021-11-19 397 return rc; 6b4661f8037e4f Ben Widawsky 2021-11-19 398 6b4661f8037e4f Ben Widawsky 2021-11-19 @399 root_port = devm_cxl_add_port(host, CXL_RESOURCE_NONE, root_port); ^^^^^^^^^^ Uninitialized. 4812be97c015bd Dan Williams 2021-06-09 400 if (IS_ERR(root_port)) 4812be97c015bd Dan Williams 2021-06-09 401 return PTR_ERR(root_port); 4812be97c015bd Dan Williams 2021-06-09 402 dev_dbg(host, "add: %s\n", dev_name(&root_port->dev)); 4812be97c015bd Dan Williams 2021-06-09 403 3b94ce7b7bc1b4 Dan Williams 2021-06-09 404 rc = bus_for_each_dev(adev->dev.bus, NULL, root_port, 7d4b5ca2e2cb5d Dan Williams 2021-06-09 405 add_host_bridge_dport); f4ce1f766f1ebf Dan Williams 2021-10-29 406 if (rc < 0) f4ce1f766f1ebf Dan Williams 2021-10-29 407 return rc; 3b94ce7b7bc1b4 Dan Williams 2021-06-09 408 f4ce1f766f1ebf Dan Williams 2021-10-29 409 ctx = (struct cxl_cfmws_context) { f4ce1f766f1ebf Dan Williams 2021-10-29 410 .dev = host, f4ce1f766f1ebf Dan Williams 2021-10-29 411 .root_port = root_port, f4ce1f766f1ebf Dan Williams 2021-10-29 412 }; f4ce1f766f1ebf Dan Williams 2021-10-29 413 acpi_table_parse_cedt(ACPI_CEDT_TYPE_CFMWS, cxl_parse_cfmws, &ctx); 3e23d17ce1980c Alison Schofield 2021-06-17 414 3b94ce7b7bc1b4 Dan Williams 2021-06-09 415 /* 3b94ce7b7bc1b4 Dan Williams 2021-06-09 416 * Root level scanned with host-bridge as dports, now scan host-bridges 3b94ce7b7bc1b4 Dan Williams 2021-06-09 417 * for their role as CXL uports to their CXL-capable PCIe Root Ports. 3b94ce7b7bc1b4 Dan Williams 2021-06-09 418 */ 8fdcb1704f61a8 Dan Williams 2021-06-15 419 rc = bus_for_each_dev(adev->dev.bus, NULL, root_port, 3b94ce7b7bc1b4 Dan Williams 2021-06-09 420 add_host_bridge_uport); f4ce1f766f1ebf Dan Williams 2021-10-29 421 if (rc < 0) f4ce1f766f1ebf Dan Williams 2021-10-29 422 return rc; 8fdcb1704f61a8 Dan Williams 2021-06-15 423 8fdcb1704f61a8 Dan Williams 2021-06-15 424 if (IS_ENABLED(CONFIG_CXL_PMEM)) 8fdcb1704f61a8 Dan Williams 2021-06-15 425 rc = device_for_each_child(&root_port->dev, root_port, 8fdcb1704f61a8 Dan Williams 2021-06-15 426 add_root_nvdimm_bridge); 8fdcb1704f61a8 Dan Williams 2021-06-15 427 if (rc < 0) 8fdcb1704f61a8 Dan Williams 2021-06-15 428 return rc; f4ce1f766f1ebf Dan Williams 2021-10-29 429 8fdcb1704f61a8 Dan Williams 2021-06-15 430 return 0; 4812be97c015bd Dan Williams 2021-06-09 431 } --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@xxxxxxxxxxxx
