On Fri, Nov 19, 2021 at 4:03 PM Ben Widawsky <ben.widawsky@xxxxxxxxx> wrote:
>
> The cxl_mem module was renamed cxl_pci in commit 21e9f76733a8 ("cxl:
> Rename mem to pci"). In preparation for adding an ancillary driver for
> cxl_memdev devices (registered on the cxl bus by cxl_pci), go ahead and
> rename CONFIG_CXL_MEM to CONFIG_CXL_PCI. Free up the CXL_MEM name for
> that new driver to manage CXL.mem endpoint operations.
>
> Suggested-by: Dan Williams <dan.j.williams@xxxxxxxxx>
Reviewed-by: Dan Williams <dan.j.williams@xxxxxxxxx>
> Signed-off-by: Ben Widawsky <ben.widawsky@xxxxxxxxx>
>
> ---
> Changes since RFCv2:
> - Reword commit message (Dan)
> - Reword Kconfig description (Dan)
> ---
> drivers/cxl/Kconfig | 23 ++++++++++++-----------
> drivers/cxl/Makefile | 2 +-
> 2 files changed, 13 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/cxl/Kconfig b/drivers/cxl/Kconfig
> index 67c91378f2dd..ef05e96f8f97 100644
> --- a/drivers/cxl/Kconfig
> +++ b/drivers/cxl/Kconfig
> @@ -13,25 +13,26 @@ menuconfig CXL_BUS
>
> if CXL_BUS
>
> -config CXL_MEM
> - tristate "CXL.mem: Memory Devices"
> +config CXL_PCI
> + tristate "PCI manageability"
> default CXL_BUS
> help
> - The CXL.mem protocol allows a device to act as a provider of
> - "System RAM" and/or "Persistent Memory" that is fully coherent
> - as if the memory was attached to the typical CPU memory
> - controller.
> + The CXL specification defines a "CXL memory device" sub-class in the
> + PCI "memory controller" base class of devices. Device's identified by
> + this class code provide support for volatile and / or persistent
> + memory to be mapped into the system address map (Host-managed Device
> + Memory (HDM)).
>
> - Say 'y/m' to enable a driver that will attach to CXL.mem devices for
> - configuration and management primarily via the mailbox interface. See
> - Chapter 2.3 Type 3 CXL Device in the CXL 2.0 specification for more
> - details.
> + Say 'y/m' to enable a driver that will attach to CXL memory expander
> + devices enumerated by the memory device class code for configuration
> + and management primarily via the mailbox interface. See Chapter 2.3
> + Type 3 CXL Device in the CXL 2.0 specification for more details.
>
> If unsure say 'm'.
>
> config CXL_MEM_RAW_COMMANDS
> bool "RAW Command Interface for Memory Devices"
> - depends on CXL_MEM
> + depends on CXL_PCI
> help
> Enable CXL RAW command interface.
>
> diff --git a/drivers/cxl/Makefile b/drivers/cxl/Makefile
> index d1aaabc940f3..cf07ae6cea17 100644
> --- a/drivers/cxl/Makefile
> +++ b/drivers/cxl/Makefile
> @@ -1,6 +1,6 @@
> # SPDX-License-Identifier: GPL-2.0
> obj-$(CONFIG_CXL_BUS) += core/
> -obj-$(CONFIG_CXL_MEM) += cxl_pci.o
> +obj-$(CONFIG_CXL_PCI) += cxl_pci.o
> obj-$(CONFIG_CXL_ACPI) += cxl_acpi.o
> obj-$(CONFIG_CXL_PMEM) += cxl_pmem.o
>
> --
> 2.34.0
>
