On Tue, Oct 26, 2021 at 03:51:21PM +0100, Dr. David Alan Gilbert wrote: > > It's more than asking nicely, we define the device_state bits as > > synchronous, the device needs to enter the state before returning from > > the write operation or return an errno. > > I don't see how it can be synchronous in practice; can it really wait to > complete if it has to take many cycles to finish off an inflight DMA > before it transitions? The fencing of outbound DMAs in the device must be synchronous, how could anything work if it isn't? Jason
