On Mon, 2021-10-25 at 13:43 +0200, Roger Pau Monné wrote: > It's kind of optional for HVM guests, as it depends on > XENFEAT_hvm_pirqs, which sadly gets unconditionally set for HVM > guests, thus dropping any benefits from having hardware assisted APIC > virtualization or posted interrupts support. Indeed. After implementing PIRQ support for Xen guests running under KVM, I spent a "happy" couple of days swearing at it because it actually *worked* if something would just *unmask* the f***ing MSI, but the guest inexplicably (to me) didn't do that. Took me a while to work out that Xen itself is *snooping* on the MSI table writes even while they are *masked*, to capture the magic MSI message (with vector==0) which means it's actually a PIRQ# in the destination ID bits, and then magically unmask the MSI when the guest binds that PIRQ to an event channel. I did not enjoy implementing that part. FWIW the *guest* could potentlaly be smarter here and elect not to use PIRQs when hardware assisted vAPIC is present. Aren't there some bits in the CPUID that Xen advertises, which indicate that?
Attachment:
smime.p7s
Description: S/MIME cryptographic signature