On Wed, 20 Jul 2011 15:20:54 -0500 Jon Mason <mason@xxxxxxxx> wrote: > On a given PCI-E fabric, each device, bridge, and root port can have a > different PCI-E maximum payload size. There is a sizable performance > boost for having the largest possible maximum payload size on each PCI-E > device. However, if improperly configured, fatal bus errors can occur. > Thus, it is important to ensure that PCI-E payloads sends by a device > are never larger than the MPS setting of all devices on the way to the > destination. Applied to my for-linus branch, thanks for being so persistent Jon! -- Jesse Barnes, Intel Open Source Technology Center -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
