Hi again, Marc, On Thu, 7 Oct 2021 at 09:52, Marc Zyngier <maz@xxxxxxxxxx> wrote: > [snipped] > > I guess this is the relevant device? Pretty much, yes. > It is interesting that it > advertises not supporting interrupt masking... Can you, you, out of > curiosity, give the following hack a go? I would expect things to > behave badly too (and maybe be even worse). But one way or another, it > may give us a hint. > > Thanks, > > M. > > diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c > index 0099a00af361..b3c0b9d07f17 100644 > --- a/drivers/pci/msi.c > +++ b/drivers/pci/msi.c > @@ -205,7 +205,7 @@ static void __pci_msi_mask_desc(struct msi_desc *desc, u32 mask) > > if (desc->msi_attrib.is_msix) > pci_msix_mask(desc); > - else if (desc->msi_attrib.maskbit) > + else //if (desc->msi_attrib.maskbit) > pci_msi_mask(desc, mask); > } > > @@ -216,7 +216,7 @@ static void __pci_msi_unmask_desc(struct msi_desc *desc, u32 mask) > > if (desc->msi_attrib.is_msix) > pci_msix_unmask(desc); > - else if (desc->msi_attrib.maskbit) > + else //if (desc->msi_attrib.maskbit) > pci_msi_unmask(desc, mask); > } Hm. You belive the controller is lying? :) Sure thing, I'll give it a spin and let you know the result. Thanks, Rui
