Hi Bjorn,
Is there any plan to revisit the fix to allow L1SS CTRL1 and CTRL2 save
and restore to work with suspend and resume.
Referring to the lkml discussion
https://lore.kernel.org/linux-pci/20201228040513.GA611645@bjorn-Precision-5520/
A patch was shared, described as :-
"4257f7e008ea restores PCI_L1SS_CTL1, then PCI_L1SS_CTL2. I think it
should do those in the reverse order, since the Enable bits are in
PCI_L1SS_CTL1. It also restores L1SS state (potentially enabling
L1.x) before we restore the PCIe Capability (potentially enabling ASPM
as a whole). Those probably should also be in the other order."
We are planning to enable aspm driver, but without L1SS control register
save and restore, it gets disabled after resume.
Thanks,
Hemant
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