Re: [PATCH v4 0/3] Improve PCI device post-reset readiness polling

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On Fri, 2021-01-22 at 08:54 +0000, David Woodhouse wrote:
> On Sat, 2020-03-07 at 18:20 +0100, Stanislav Spassov wrote:
> > From: Stanislav Spassov <
> > stanspas@xxxxxxxxx
> > >
> > 
> > The first version of this patch series can be found here:
> > https://lore.kernel.org/linux-pci/20200223122057.6504-1-stanspas@xxxxxxxxxx
> > 
> > 
> > The goal of this patch series is to solve an issue where pci_dev_wait
> > can cause system crashes. After a reset, a hung device may keep
> > responding with CRS completions indefinitely. If CRS Software Visibility
> > is enabled on the Root Port, attempting to read any register other than
> > PCI_VENDOR_ID will cause the Root Port to autonomously retry the request
> > without reporting back to the CPU core. Unless the number of retries or
> > the amount of time spent retrying is limited by platform-specific means,
> > this scenario leads to low-level platform timeouts (such as a TOR
> > Timeout), which can easily escalate to a crash.
> > 
> > Feedback on the v1 inspired a lot of additional improvements all around the
> > device reset codepaths and reducing post-reset delays. These improvements
> > were published as part of v2 (v3 is just small build fixes).
> > 
> > It looks like there is immediate demand specifically for the CRS work,
> > so I am once again reducing the series to just that. The reset will be
> > posted as a separate patch series that will likely require more time and
> > iterations to stabilize.
> 
> Hm, what happened to this?
> 
> Bjorn?

Ping?

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