Actually I don't get any prints related to non-detected buses. But I see that the bus number is skipped for those devices. Tried to debug in the kernel by inserting prints in the pci scan path but I don't even see that bus is getting created. Is it dependent on the bios order? Looks like bios skips the device which is immediately after the ari capable device. I also don't see any failure message in the dmesg. The problem is parented_bus scan as well individual single device bus scan / pci slot scan is not failing. This is x86 based server lspci output is: 08:00.0 0a:00.0 0c:00.0 0e:00.0 I can post the dmesg output with the explicitly added prints. Is the scanning of the bus depends upon what bios exposes to the OS? I don't see BIOS scanning the bus either. It just does 4 reads to the config space of the non-detected device and no writes at all. Thanks Sagar On Fri, Jul 1, 2011 at 8:57 PM, Bjorn Helgaas <bhelgaas@xxxxxxxxxx> wrote: > On Fri, Jul 1, 2011 at 2:09 AM, Sagar Borikar <sagar.borikar@xxxxxxxxx> wrote: >> Hi, >> >> I have a device which is ARI/SRIOV enabled identified by the system at >> 08:00.0 the corresponding function lie on the same bus which are also >> getting detected. >> The next device lies on bus 09:00.0. I see that the bus is getting >> reserved for that but device node is not getting created. If I create >> a device sitting on 0a:00.0 it gets detected. >> What kind of limitation the BIOS impose on the base device if the >> device is supporting ARI. I am finding that every alternate device is >> getting detected if the ARI capability is added in each device. > > It would be useful to see the complete dmesg log to get more > information and make this more concrete. > > Bjorn > -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
