Hi Lukas, I love your patch! Perhaps something to improve: [auto build test WARNING on char-misc/char-misc-testing] [also build test WARNING on pci/next soc/for-next v5.14-rc6 next-20210819] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/0day-ci/linux/commits/Lukas-Bulwahn/mei-improve-Denverton-HSM-IFSI-support/20210819-230718 base: https://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc.git b2159182dd498fdb0f49e371ccc94efbc12d1f8e config: x86_64-randconfig-r015-20210818 (attached as .config) compiler: clang version 14.0.0 (https://github.com/llvm/llvm-project d2b574a4dea5b718e4386bf2e26af0126e5978ce) reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/0day-ci/linux/commit/2b98fe0ded99ab7eaf389fa1c91b3d9aad7c93a3 git remote add linux-review https://github.com/0day-ci/linux git fetch --no-tags linux-review Lukas-Bulwahn/mei-improve-Denverton-HSM-IFSI-support/20210819-230718 git checkout 2b98fe0ded99ab7eaf389fa1c91b3d9aad7c93a3 # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=clang make.cross ARCH=x86_64 If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp@xxxxxxxxx> All warnings (new ones prefixed by >>): drivers/misc/mei/pci-me.c:80:39: error: use of undeclared identifier 'MEI_ME_PCH8_SPS_CFG' {MEI_PCI_DEVICE(MEI_DEV_ID_DNV_IE_2, MEI_ME_PCH8_SPS_CFG)}, ^ >> drivers/misc/mei/pci-me.c:195:31: warning: shift count >= width of type [-Wshift-count-overflow] if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) || ^~~~~~~~~~~~~~~~ include/linux/dma-mapping.h:76:54: note: expanded from macro 'DMA_BIT_MASK' #define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1)) ^ ~~~ drivers/misc/mei/pci-me.c:196:40: warning: shift count >= width of type [-Wshift-count-overflow] dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) { ^~~~~~~~~~~~~~~~ include/linux/dma-mapping.h:76:54: note: expanded from macro 'DMA_BIT_MASK' #define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1)) ^ ~~~ 2 warnings and 1 error generated. vim +195 drivers/misc/mei/pci-me.c 2703d4b2e673cc Tomas Winkler 2013-02-06 25 2703d4b2e673cc Tomas Winkler 2013-02-06 26 /* mei_pci_tbl - PCI Device ID Table */ a05f8f86e49749 Tomas Winkler 2014-03-16 27 static const struct pci_device_id mei_me_pci_tbl[] = { f5ac3c49ff0b36 Tomas Winkler 2017-06-14 28 {MEI_PCI_DEVICE(MEI_DEV_ID_82946GZ, MEI_ME_ICH_CFG)}, f5ac3c49ff0b36 Tomas Winkler 2017-06-14 29 {MEI_PCI_DEVICE(MEI_DEV_ID_82G35, MEI_ME_ICH_CFG)}, f5ac3c49ff0b36 Tomas Winkler 2017-06-14 30 {MEI_PCI_DEVICE(MEI_DEV_ID_82Q965, MEI_ME_ICH_CFG)}, f5ac3c49ff0b36 Tomas Winkler 2017-06-14 31 {MEI_PCI_DEVICE(MEI_DEV_ID_82G965, MEI_ME_ICH_CFG)}, f5ac3c49ff0b36 Tomas Winkler 2017-06-14 32 {MEI_PCI_DEVICE(MEI_DEV_ID_82GM965, MEI_ME_ICH_CFG)}, f5ac3c49ff0b36 Tomas Winkler 2017-06-14 33 {MEI_PCI_DEVICE(MEI_DEV_ID_82GME965, MEI_ME_ICH_CFG)}, f5ac3c49ff0b36 Tomas Winkler 2017-06-14 34 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82Q35, MEI_ME_ICH_CFG)}, f5ac3c49ff0b36 Tomas Winkler 2017-06-14 35 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82G33, MEI_ME_ICH_CFG)}, f5ac3c49ff0b36 Tomas Winkler 2017-06-14 36 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82Q33, MEI_ME_ICH_CFG)}, f5ac3c49ff0b36 Tomas Winkler 2017-06-14 37 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82X38, MEI_ME_ICH_CFG)}, f5ac3c49ff0b36 Tomas Winkler 2017-06-14 38 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_3200, MEI_ME_ICH_CFG)}, f5ac3c49ff0b36 Tomas Winkler 2017-06-14 39 f5ac3c49ff0b36 Tomas Winkler 2017-06-14 40 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_6, MEI_ME_ICH_CFG)}, f5ac3c49ff0b36 Tomas Winkler 2017-06-14 41 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_7, MEI_ME_ICH_CFG)}, f5ac3c49ff0b36 Tomas Winkler 2017-06-14 42 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_8, MEI_ME_ICH_CFG)}, f5ac3c49ff0b36 Tomas Winkler 2017-06-14 43 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_9, MEI_ME_ICH_CFG)}, f5ac3c49ff0b36 Tomas Winkler 2017-06-14 44 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_10, MEI_ME_ICH_CFG)}, f5ac3c49ff0b36 Tomas Winkler 2017-06-14 45 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_1, MEI_ME_ICH_CFG)}, f5ac3c49ff0b36 Tomas Winkler 2017-06-14 46 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_2, MEI_ME_ICH_CFG)}, f5ac3c49ff0b36 Tomas Winkler 2017-06-14 47 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_3, MEI_ME_ICH_CFG)}, f5ac3c49ff0b36 Tomas Winkler 2017-06-14 48 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_4, MEI_ME_ICH_CFG)}, f5ac3c49ff0b36 Tomas Winkler 2017-06-14 49 f5ac3c49ff0b36 Tomas Winkler 2017-06-14 50 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_1, MEI_ME_ICH10_CFG)}, f5ac3c49ff0b36 Tomas Winkler 2017-06-14 51 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_2, MEI_ME_ICH10_CFG)}, f5ac3c49ff0b36 Tomas Winkler 2017-06-14 52 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_3, MEI_ME_ICH10_CFG)}, f5ac3c49ff0b36 Tomas Winkler 2017-06-14 53 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_4, MEI_ME_ICH10_CFG)}, f5ac3c49ff0b36 Tomas Winkler 2017-06-14 54 f8204f0ddd6296 Alexander Usyskin 2019-10-04 55 {MEI_PCI_DEVICE(MEI_DEV_ID_IBXPK_1, MEI_ME_PCH6_CFG)}, f8204f0ddd6296 Alexander Usyskin 2019-10-04 56 {MEI_PCI_DEVICE(MEI_DEV_ID_IBXPK_2, MEI_ME_PCH6_CFG)}, f5ac3c49ff0b36 Tomas Winkler 2017-06-14 57 {MEI_PCI_DEVICE(MEI_DEV_ID_CPT_1, MEI_ME_PCH_CPT_PBG_CFG)}, f5ac3c49ff0b36 Tomas Winkler 2017-06-14 58 {MEI_PCI_DEVICE(MEI_DEV_ID_PBG_1, MEI_ME_PCH_CPT_PBG_CFG)}, f8204f0ddd6296 Alexander Usyskin 2019-10-04 59 {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_1, MEI_ME_PCH7_CFG)}, f8204f0ddd6296 Alexander Usyskin 2019-10-04 60 {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_2, MEI_ME_PCH7_CFG)}, f8204f0ddd6296 Alexander Usyskin 2019-10-04 61 {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_3, MEI_ME_PCH7_CFG)}, f76d77f50b343b Tomas Winkler 2020-06-19 62 {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_H, MEI_ME_PCH8_SPS_4_CFG)}, f76d77f50b343b Tomas Winkler 2020-06-19 63 {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_W, MEI_ME_PCH8_SPS_4_CFG)}, f5ac3c49ff0b36 Tomas Winkler 2017-06-14 64 {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_LP, MEI_ME_PCH8_CFG)}, f76d77f50b343b Tomas Winkler 2020-06-19 65 {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_HR, MEI_ME_PCH8_SPS_4_CFG)}, f5ac3c49ff0b36 Tomas Winkler 2017-06-14 66 {MEI_PCI_DEVICE(MEI_DEV_ID_WPT_LP, MEI_ME_PCH8_CFG)}, f5ac3c49ff0b36 Tomas Winkler 2017-06-14 67 {MEI_PCI_DEVICE(MEI_DEV_ID_WPT_LP_2, MEI_ME_PCH8_CFG)}, f5ac3c49ff0b36 Tomas Winkler 2017-06-14 68 f5ac3c49ff0b36 Tomas Winkler 2017-06-14 69 {MEI_PCI_DEVICE(MEI_DEV_ID_SPT, MEI_ME_PCH8_CFG)}, f5ac3c49ff0b36 Tomas Winkler 2017-06-14 70 {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_2, MEI_ME_PCH8_CFG)}, 2f79d3d1f7f088 Alexander Usyskin 2020-07-28 71 {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_3, MEI_ME_PCH8_ITOUCH_CFG)}, f76d77f50b343b Tomas Winkler 2020-06-19 72 {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_H, MEI_ME_PCH8_SPS_4_CFG)}, f76d77f50b343b Tomas Winkler 2020-06-19 73 {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_H_2, MEI_ME_PCH8_SPS_4_CFG)}, f76d77f50b343b Tomas Winkler 2020-06-19 74 {MEI_PCI_DEVICE(MEI_DEV_ID_LBG, MEI_ME_PCH12_SPS_4_CFG)}, f5ac3c49ff0b36 Tomas Winkler 2017-06-14 75 f5ac3c49ff0b36 Tomas Winkler 2017-06-14 76 {MEI_PCI_DEVICE(MEI_DEV_ID_BXT_M, MEI_ME_PCH8_CFG)}, f5ac3c49ff0b36 Tomas Winkler 2017-06-14 77 {MEI_PCI_DEVICE(MEI_DEV_ID_APL_I, MEI_ME_PCH8_CFG)}, f5ac3c49ff0b36 Tomas Winkler 2017-06-14 78 f7ee8ead151f9d Tomas Winkler 2019-01-13 79 {MEI_PCI_DEVICE(MEI_DEV_ID_DNV_IE, MEI_ME_PCH8_CFG)}, 2b98fe0ded99ab Lukas Bulwahn 2021-08-19 @80 {MEI_PCI_DEVICE(MEI_DEV_ID_DNV_IE_2, MEI_ME_PCH8_SPS_CFG)}, f7ee8ead151f9d Tomas Winkler 2019-01-13 81 688cb67839e852 Tomas Winkler 2017-09-24 82 {MEI_PCI_DEVICE(MEI_DEV_ID_GLK, MEI_ME_PCH8_CFG)}, 688cb67839e852 Tomas Winkler 2017-09-24 83 f5ac3c49ff0b36 Tomas Winkler 2017-06-14 84 {MEI_PCI_DEVICE(MEI_DEV_ID_KBP, MEI_ME_PCH8_CFG)}, f5ac3c49ff0b36 Tomas Winkler 2017-06-14 85 {MEI_PCI_DEVICE(MEI_DEV_ID_KBP_2, MEI_ME_PCH8_CFG)}, 4afc339ef0d259 Tomas Winkler 2020-06-19 86 {MEI_PCI_DEVICE(MEI_DEV_ID_KBP_3, MEI_ME_PCH8_CFG)}, ac182e8abc6f93 Alexander Usyskin 2016-09-12 87 1dbfe7f23bdb72 Alexander Usyskin 2018-11-22 88 {MEI_PCI_DEVICE(MEI_DEV_ID_CNP_LP, MEI_ME_PCH12_CFG)}, 2f79d3d1f7f088 Alexander Usyskin 2020-07-28 89 {MEI_PCI_DEVICE(MEI_DEV_ID_CNP_LP_3, MEI_ME_PCH8_ITOUCH_CFG)}, f76d77f50b343b Tomas Winkler 2020-06-19 90 {MEI_PCI_DEVICE(MEI_DEV_ID_CNP_H, MEI_ME_PCH12_SPS_CFG)}, 2f79d3d1f7f088 Alexander Usyskin 2020-07-28 91 {MEI_PCI_DEVICE(MEI_DEV_ID_CNP_H_3, MEI_ME_PCH12_SPS_ITOUCH_CFG)}, f8f4aa68a8ae98 Alexander Usyskin 2018-02-18 92 4d86dfd38285c8 Tomas Winkler 2019-10-02 93 {MEI_PCI_DEVICE(MEI_DEV_ID_CMP_LP, MEI_ME_PCH12_CFG)}, 2f79d3d1f7f088 Alexander Usyskin 2020-07-28 94 {MEI_PCI_DEVICE(MEI_DEV_ID_CMP_LP_3, MEI_ME_PCH8_ITOUCH_CFG)}, 82b29b9f72afdc Alexander Usyskin 2019-11-05 95 {MEI_PCI_DEVICE(MEI_DEV_ID_CMP_V, MEI_ME_PCH12_CFG)}, 559e575a8946a6 Tomas Winkler 2020-01-19 96 {MEI_PCI_DEVICE(MEI_DEV_ID_CMP_H, MEI_ME_PCH12_CFG)}, 2f79d3d1f7f088 Alexander Usyskin 2020-07-28 97 {MEI_PCI_DEVICE(MEI_DEV_ID_CMP_H_3, MEI_ME_PCH8_ITOUCH_CFG)}, 4d86dfd38285c8 Tomas Winkler 2019-10-02 98 efe814e90b98ae Tomas Winkler 2019-01-24 99 {MEI_PCI_DEVICE(MEI_DEV_ID_ICP_LP, MEI_ME_PCH12_CFG)}, efe814e90b98ae Tomas Winkler 2019-01-24 100 52f6efdf809244 Alexander Usyskin 2019-11-07 101 {MEI_PCI_DEVICE(MEI_DEV_ID_TGP_LP, MEI_ME_PCH15_CFG)}, 8c289ea0641652 Alexander Usyskin 2020-06-19 102 {MEI_PCI_DEVICE(MEI_DEV_ID_TGP_H, MEI_ME_PCH15_SPS_CFG)}, 587f17407741a5 Tomas Winkler 2019-08-19 103 0db4a15d4c2787 Tomas Winkler 2020-01-24 104 {MEI_PCI_DEVICE(MEI_DEV_ID_JSP_N, MEI_ME_PCH15_CFG)}, 0db4a15d4c2787 Tomas Winkler 2020-01-24 105 52f6efdf809244 Alexander Usyskin 2019-11-07 106 {MEI_PCI_DEVICE(MEI_DEV_ID_MCC, MEI_ME_PCH15_CFG)}, 1be8624a0cbef7 Alexander Usyskin 2019-07-12 107 {MEI_PCI_DEVICE(MEI_DEV_ID_MCC_4, MEI_ME_PCH8_CFG)}, 1be8624a0cbef7 Alexander Usyskin 2019-07-12 108 99397d33b763dc Alexander Usyskin 2020-03-24 109 {MEI_PCI_DEVICE(MEI_DEV_ID_CDF, MEI_ME_PCH8_CFG)}, 99397d33b763dc Alexander Usyskin 2020-03-24 110 372726cb3957db Tomas Winkler 2021-01-29 111 {MEI_PCI_DEVICE(MEI_DEV_ID_EBG, MEI_ME_PCH15_SPS_CFG)}, 372726cb3957db Tomas Winkler 2021-01-29 112 f7545efaf7950b Alexander Usyskin 2021-01-29 113 {MEI_PCI_DEVICE(MEI_DEV_ID_ADP_S, MEI_ME_PCH15_CFG)}, 930c922a987a02 Alexander Usyskin 2021-01-29 114 {MEI_PCI_DEVICE(MEI_DEV_ID_ADP_LP, MEI_ME_PCH15_CFG)}, 0df74278faedf2 Tomas Winkler 2021-04-14 115 {MEI_PCI_DEVICE(MEI_DEV_ID_ADP_P, MEI_ME_PCH15_CFG)}, f7545efaf7950b Alexander Usyskin 2021-01-29 116 2703d4b2e673cc Tomas Winkler 2013-02-06 117 /* required last entry */ 2703d4b2e673cc Tomas Winkler 2013-02-06 118 {0, } 2703d4b2e673cc Tomas Winkler 2013-02-06 119 }; 2703d4b2e673cc Tomas Winkler 2013-02-06 120 b68301e9acd30f Tomas Winkler 2013-03-27 121 MODULE_DEVICE_TABLE(pci, mei_me_pci_tbl); 2703d4b2e673cc Tomas Winkler 2013-02-06 122 bbd6d050754731 Rafael J. Wysocki 2014-12-04 123 #ifdef CONFIG_PM e13fa90ce42d8e Tomas Winkler 2014-03-18 124 static inline void mei_me_set_pm_domain(struct mei_device *dev); e13fa90ce42d8e Tomas Winkler 2014-03-18 125 static inline void mei_me_unset_pm_domain(struct mei_device *dev); e13fa90ce42d8e Tomas Winkler 2014-03-18 126 #else e13fa90ce42d8e Tomas Winkler 2014-03-18 127 static inline void mei_me_set_pm_domain(struct mei_device *dev) {} e13fa90ce42d8e Tomas Winkler 2014-03-18 128 static inline void mei_me_unset_pm_domain(struct mei_device *dev) {} bbd6d050754731 Rafael J. Wysocki 2014-12-04 129 #endif /* CONFIG_PM */ e13fa90ce42d8e Tomas Winkler 2014-03-18 130 261e071acd9bcb Tomas Winkler 2019-11-07 131 static int mei_me_read_fws(const struct mei_device *dev, int where, u32 *val) 261e071acd9bcb Tomas Winkler 2019-11-07 132 { 261e071acd9bcb Tomas Winkler 2019-11-07 133 struct pci_dev *pdev = to_pci_dev(dev->dev); 261e071acd9bcb Tomas Winkler 2019-11-07 134 261e071acd9bcb Tomas Winkler 2019-11-07 135 return pci_read_config_dword(pdev, where, val); 261e071acd9bcb Tomas Winkler 2019-11-07 136 } 261e071acd9bcb Tomas Winkler 2019-11-07 137 2703d4b2e673cc Tomas Winkler 2013-02-06 138 /** ce23139c6c2ee9 Alexander Usyskin 2014-09-29 139 * mei_me_quirk_probe - probe for devices that doesn't valid ME interface 393b148f9d0e70 Masanari Iida 2013-04-05 140 * 2703d4b2e673cc Tomas Winkler 2013-02-06 141 * @pdev: PCI device structure c919951d940f28 Tomas Winkler 2014-05-13 142 * @cfg: per generation config 2703d4b2e673cc Tomas Winkler 2013-02-06 143 * a8605ea2c20c2b Alexander Usyskin 2014-09-29 144 * Return: true if ME Interface is valid, false otherwise 2703d4b2e673cc Tomas Winkler 2013-02-06 145 */ b68301e9acd30f Tomas Winkler 2013-03-27 146 static bool mei_me_quirk_probe(struct pci_dev *pdev, c919951d940f28 Tomas Winkler 2014-05-13 147 const struct mei_cfg *cfg) 2703d4b2e673cc Tomas Winkler 2013-02-06 148 { c919951d940f28 Tomas Winkler 2014-05-13 149 if (cfg->quirk_probe && cfg->quirk_probe(pdev)) { c919951d940f28 Tomas Winkler 2014-05-13 150 dev_info(&pdev->dev, "Device doesn't have valid ME Interface\n"); c919951d940f28 Tomas Winkler 2014-05-13 151 return false; 2703d4b2e673cc Tomas Winkler 2013-02-06 152 } 5e6533a6f52f1a Tomas Winkler 2014-03-25 153 2703d4b2e673cc Tomas Winkler 2013-02-06 154 return true; 2703d4b2e673cc Tomas Winkler 2013-02-06 155 } c919951d940f28 Tomas Winkler 2014-05-13 156 2703d4b2e673cc Tomas Winkler 2013-02-06 157 /** ce23139c6c2ee9 Alexander Usyskin 2014-09-29 158 * mei_me_probe - Device Initialization Routine 2703d4b2e673cc Tomas Winkler 2013-02-06 159 * 2703d4b2e673cc Tomas Winkler 2013-02-06 160 * @pdev: PCI device structure 2703d4b2e673cc Tomas Winkler 2013-02-06 161 * @ent: entry in kcs_pci_tbl 2703d4b2e673cc Tomas Winkler 2013-02-06 162 * a8605ea2c20c2b Alexander Usyskin 2014-09-29 163 * Return: 0 on success, <0 on failure. 2703d4b2e673cc Tomas Winkler 2013-02-06 164 */ b68301e9acd30f Tomas Winkler 2013-03-27 165 static int mei_me_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 2703d4b2e673cc Tomas Winkler 2013-02-06 166 { f5ac3c49ff0b36 Tomas Winkler 2017-06-14 167 const struct mei_cfg *cfg; 2703d4b2e673cc Tomas Winkler 2013-02-06 168 struct mei_device *dev; 52c34561415b42 Tomas Winkler 2013-02-06 169 struct mei_me_hw *hw; 1fa55b4e0e161b Alexander Usyskin 2015-08-02 170 unsigned int irqflags; 2703d4b2e673cc Tomas Winkler 2013-02-06 171 int err; 2703d4b2e673cc Tomas Winkler 2013-02-06 172 f5ac3c49ff0b36 Tomas Winkler 2017-06-14 173 cfg = mei_me_get_cfg(ent->driver_data); f5ac3c49ff0b36 Tomas Winkler 2017-06-14 174 if (!cfg) f5ac3c49ff0b36 Tomas Winkler 2017-06-14 175 return -ENODEV; 2703d4b2e673cc Tomas Winkler 2013-02-06 176 c919951d940f28 Tomas Winkler 2014-05-13 177 if (!mei_me_quirk_probe(pdev, cfg)) c919951d940f28 Tomas Winkler 2014-05-13 178 return -ENODEV; 2703d4b2e673cc Tomas Winkler 2013-02-06 179 2703d4b2e673cc Tomas Winkler 2013-02-06 180 /* enable pci dev */ f8a096059fc5f7 Tomas Winkler 2017-01-26 181 err = pcim_enable_device(pdev); 2703d4b2e673cc Tomas Winkler 2013-02-06 182 if (err) { 2703d4b2e673cc Tomas Winkler 2013-02-06 183 dev_err(&pdev->dev, "failed to enable pci device.\n"); 2703d4b2e673cc Tomas Winkler 2013-02-06 184 goto end; 2703d4b2e673cc Tomas Winkler 2013-02-06 185 } 2703d4b2e673cc Tomas Winkler 2013-02-06 186 /* set PCI host mastering */ 2703d4b2e673cc Tomas Winkler 2013-02-06 187 pci_set_master(pdev); f8a096059fc5f7 Tomas Winkler 2017-01-26 188 /* pci request regions and mapping IO device memory for mei driver */ f8a096059fc5f7 Tomas Winkler 2017-01-26 189 err = pcim_iomap_regions(pdev, BIT(0), KBUILD_MODNAME); 2703d4b2e673cc Tomas Winkler 2013-02-06 190 if (err) { 2703d4b2e673cc Tomas Winkler 2013-02-06 191 dev_err(&pdev->dev, "failed to get pci regions.\n"); f8a096059fc5f7 Tomas Winkler 2017-01-26 192 goto end; 2703d4b2e673cc Tomas Winkler 2013-02-06 193 } 3ecfb168a51ddf Tomas Winkler 2013-12-17 194 3ecfb168a51ddf Tomas Winkler 2013-12-17 @195 if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) || 3ecfb168a51ddf Tomas Winkler 2013-12-17 196 dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) { 3ecfb168a51ddf Tomas Winkler 2013-12-17 197 3ecfb168a51ddf Tomas Winkler 2013-12-17 198 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)); 3ecfb168a51ddf Tomas Winkler 2013-12-17 199 if (err) 3ecfb168a51ddf Tomas Winkler 2013-12-17 200 err = dma_set_coherent_mask(&pdev->dev, 3ecfb168a51ddf Tomas Winkler 2013-12-17 201 DMA_BIT_MASK(32)); 3ecfb168a51ddf Tomas Winkler 2013-12-17 202 } 3ecfb168a51ddf Tomas Winkler 2013-12-17 203 if (err) { 3ecfb168a51ddf Tomas Winkler 2013-12-17 204 dev_err(&pdev->dev, "No usable DMA configuration, aborting\n"); f8a096059fc5f7 Tomas Winkler 2017-01-26 205 goto end; 3ecfb168a51ddf Tomas Winkler 2013-12-17 206 } 3ecfb168a51ddf Tomas Winkler 2013-12-17 207 2703d4b2e673cc Tomas Winkler 2013-02-06 208 /* allocates and initializes the mei dev structure */ 907b471ca228a5 Tomas Winkler 2019-11-07 209 dev = mei_me_dev_init(&pdev->dev, cfg); 2703d4b2e673cc Tomas Winkler 2013-02-06 210 if (!dev) { 2703d4b2e673cc Tomas Winkler 2013-02-06 211 err = -ENOMEM; f8a096059fc5f7 Tomas Winkler 2017-01-26 212 goto end; 2703d4b2e673cc Tomas Winkler 2013-02-06 213 } 52c34561415b42 Tomas Winkler 2013-02-06 214 hw = to_me_hw(dev); f8a096059fc5f7 Tomas Winkler 2017-01-26 215 hw->mem_addr = pcim_iomap_table(pdev)[0]; 261e071acd9bcb Tomas Winkler 2019-11-07 216 hw->read_fws = mei_me_read_fws; f8a096059fc5f7 Tomas Winkler 2017-01-26 217 2703d4b2e673cc Tomas Winkler 2013-02-06 218 pci_enable_msi(pdev); 2703d4b2e673cc Tomas Winkler 2013-02-06 219 fec874a81b3ec2 Benjamin Lee 2020-04-17 220 hw->irq = pdev->irq; fec874a81b3ec2 Benjamin Lee 2020-04-17 221 2703d4b2e673cc Tomas Winkler 2013-02-06 222 /* request and enable interrupt */ 1fa55b4e0e161b Alexander Usyskin 2015-08-02 223 irqflags = pci_dev_msi_enabled(pdev) ? IRQF_ONESHOT : IRQF_SHARED; 1fa55b4e0e161b Alexander Usyskin 2015-08-02 224 2703d4b2e673cc Tomas Winkler 2013-02-06 225 err = request_threaded_irq(pdev->irq, 06ecd645980096 Tomas Winkler 2013-02-06 226 mei_me_irq_quick_handler, 06ecd645980096 Tomas Winkler 2013-02-06 227 mei_me_irq_thread_handler, 1fa55b4e0e161b Alexander Usyskin 2015-08-02 228 irqflags, KBUILD_MODNAME, dev); 2703d4b2e673cc Tomas Winkler 2013-02-06 229 if (err) { 2703d4b2e673cc Tomas Winkler 2013-02-06 230 dev_err(&pdev->dev, "request_threaded_irq failure. irq = %d\n", 2703d4b2e673cc Tomas Winkler 2013-02-06 231 pdev->irq); f8a096059fc5f7 Tomas Winkler 2017-01-26 232 goto end; 2703d4b2e673cc Tomas Winkler 2013-02-06 233 } 2703d4b2e673cc Tomas Winkler 2013-02-06 234 c4d589be4405d4 Tomas Winkler 2013-03-27 235 if (mei_start(dev)) { 2703d4b2e673cc Tomas Winkler 2013-02-06 236 dev_err(&pdev->dev, "init hw failure.\n"); 2703d4b2e673cc Tomas Winkler 2013-02-06 237 err = -ENODEV; 2703d4b2e673cc Tomas Winkler 2013-02-06 238 goto release_irq; 2703d4b2e673cc Tomas Winkler 2013-02-06 239 } 2703d4b2e673cc Tomas Winkler 2013-02-06 240 180ea05bcedbd6 Tomas Winkler 2014-03-18 241 pm_runtime_set_autosuspend_delay(&pdev->dev, MEI_ME_RPM_TIMEOUT); 180ea05bcedbd6 Tomas Winkler 2014-03-18 242 pm_runtime_use_autosuspend(&pdev->dev); 180ea05bcedbd6 Tomas Winkler 2014-03-18 243 f3d8e8788b4efb Alexander Usyskin 2014-06-23 244 err = mei_register(dev, &pdev->dev); 2703d4b2e673cc Tomas Winkler 2013-02-06 245 if (err) 1f7e489a285c8b Alexander Usyskin 2016-02-07 246 goto stop; 2703d4b2e673cc Tomas Winkler 2013-02-06 247 2703d4b2e673cc Tomas Winkler 2013-02-06 248 pci_set_drvdata(pdev, dev); 2703d4b2e673cc Tomas Winkler 2013-02-06 249 557909e195aea2 Alexander Usyskin 2017-08-03 250 /* 557909e195aea2 Alexander Usyskin 2017-08-03 251 * MEI requires to resume from runtime suspend mode 557909e195aea2 Alexander Usyskin 2017-08-03 252 * in order to perform link reset flow upon system suspend. 557909e195aea2 Alexander Usyskin 2017-08-03 253 */ e07515563d010d Rafael J. Wysocki 2020-04-18 254 dev_pm_set_driver_flags(&pdev->dev, DPM_FLAG_NO_DIRECT_COMPLETE); 557909e195aea2 Alexander Usyskin 2017-08-03 255 e13fa90ce42d8e Tomas Winkler 2014-03-18 256 /* b42dc0635bf0a6 Alexander Usyskin 2017-09-26 257 * ME maps runtime suspend/resume to D0i states, b42dc0635bf0a6 Alexander Usyskin 2017-09-26 258 * hence we need to go around native PCI runtime service which b42dc0635bf0a6 Alexander Usyskin 2017-09-26 259 * eventually brings the device into D3cold/hot state, b42dc0635bf0a6 Alexander Usyskin 2017-09-26 260 * but the mei device cannot wake up from D3 unlike from D0i3. b42dc0635bf0a6 Alexander Usyskin 2017-09-26 261 * To get around the PCI device native runtime pm, b42dc0635bf0a6 Alexander Usyskin 2017-09-26 262 * ME uses runtime pm domain handlers which take precedence b42dc0635bf0a6 Alexander Usyskin 2017-09-26 263 * over the driver's pm handlers. e13fa90ce42d8e Tomas Winkler 2014-03-18 264 */ e13fa90ce42d8e Tomas Winkler 2014-03-18 265 mei_me_set_pm_domain(dev); e13fa90ce42d8e Tomas Winkler 2014-03-18 266 cc365dcf0e5627 Tomas Winkler 2018-01-02 267 if (mei_pg_is_enabled(dev)) { 180ea05bcedbd6 Tomas Winkler 2014-03-18 268 pm_runtime_put_noidle(&pdev->dev); cc365dcf0e5627 Tomas Winkler 2018-01-02 269 if (hw->d0i3_supported) cc365dcf0e5627 Tomas Winkler 2018-01-02 270 pm_runtime_allow(&pdev->dev); cc365dcf0e5627 Tomas Winkler 2018-01-02 271 } 180ea05bcedbd6 Tomas Winkler 2014-03-18 272 c4e87b525936da Alexander Usyskin 2013-10-21 273 dev_dbg(&pdev->dev, "initialization successful.\n"); 2703d4b2e673cc Tomas Winkler 2013-02-06 274 2703d4b2e673cc Tomas Winkler 2013-02-06 275 return 0; 2703d4b2e673cc Tomas Winkler 2013-02-06 276 1f7e489a285c8b Alexander Usyskin 2016-02-07 277 stop: 1f7e489a285c8b Alexander Usyskin 2016-02-07 278 mei_stop(dev); 2703d4b2e673cc Tomas Winkler 2013-02-06 279 release_irq: dc844b0d99b853 Tomas Winkler 2013-11-11 280 mei_cancel_work(dev); 2703d4b2e673cc Tomas Winkler 2013-02-06 281 mei_disable_interrupts(dev); 2703d4b2e673cc Tomas Winkler 2013-02-06 282 free_irq(pdev->irq, dev); 2703d4b2e673cc Tomas Winkler 2013-02-06 283 end: 2703d4b2e673cc Tomas Winkler 2013-02-06 284 dev_err(&pdev->dev, "initialization failed.\n"); 2703d4b2e673cc Tomas Winkler 2013-02-06 285 return err; 2703d4b2e673cc Tomas Winkler 2013-02-06 286 } 2703d4b2e673cc Tomas Winkler 2013-02-06 287 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@xxxxxxxxxxxx
Attachment:
.config.gz
Description: application/gzip
