On Mon, Jul 19, 2021 at 07:23:40PM +0200, Pali Rohár wrote:
[...]
> > > > +#ifdef CONFIG_ARM
> > > > +static DEFINE_SPINLOCK(pmsr_lock);
> > > > +static int rcar_pcie_aarch32_abort_handler(unsigned long addr,
> > > > + unsigned int fsr, struct pt_regs *regs)
> > > > +{
> > > > + unsigned long flags;
> > > > + int ret = 0;
> > > > + u32 pmsr;
> > > > +
> > > > + spin_lock_irqsave(&pmsr_lock, flags);
> > > > +
> > > > + if (!pcie_base || !__clk_is_enabled(pcie_bus_clk)) {
> > > > + ret = 1;
> > > > + goto unlock_exit;
> > > > + }
> > > > +
> > > > + pmsr = readl(pcie_base + PMSR);
> > > > +
> > > > + /*
> > > > + * Test if the PCIe controller received PM_ENTER_L1 DLLP and
> > > > + * the PCIe controller is not in L1 link state. If true, apply
> > > > + * fix, which will put the controller into L1 link state, from
> > > > + * which it can return to L0s/L0 on its own.
> > > > + */
> > > > + if ((pmsr & PMEL1RX) && ((pmsr & PMSTATE) != PMSTATE_L1)) {
> > > > + writel(L1IATN, pcie_base + PMCTLR);
> > > > + while (!(readl(pcie_base + PMSR) & L1FAEG))
> > > > + ;
>
> Infinite loop in abort handler is not a good idea. If this software
> workaround is not able to fix HW in broken state then it is better to
> let kernel finish abort handler and reboot machine (or whatever is
> default action for particular abort handler).
Probably worth adding a timeout, I can do it before merging it.
Lorenzo
> > > > + writel(L1FAEG | PMEL1RX, pcie_base + PMSR);
> > > > + }
> > > > +
> > > > +unlock_exit:
> > > > + spin_unlock_irqrestore(&pmsr_lock, flags);
> > > > + return ret;
> > > > +}
> > > > +
> > > > +static const struct of_device_id rcar_pcie_abort_handler_of_match[] __initconst = {
> > > > + { .compatible = "renesas,pcie-r8a7779" },
> > > > + { .compatible = "renesas,pcie-r8a7790" },
> > > > + { .compatible = "renesas,pcie-r8a7791" },
> > > > + { .compatible = "renesas,pcie-rcar-gen2" },
> > > > + {},
> > > > +};
> > > > +
> > > > +static int __init rcar_pcie_init(void)
> > > > +{
> > > > + if (of_find_matching_node(NULL, rcar_pcie_abort_handler_of_match)) {
> > > > +#ifdef CONFIG_ARM_LPAE
> > > > + hook_fault_code(17, rcar_pcie_aarch32_abort_handler, SIGBUS, 0,
> > > > + "asynchronous external abort");
> > > > +#else
> > > > + hook_fault_code(22, rcar_pcie_aarch32_abort_handler, SIGBUS, 0,
> > > > + "imprecise external abort");
> > > > +#endif
> > > > + }
> > > > +
> > > > + return platform_driver_register(&rcar_pcie_driver);
> > > > +}
> > > > +device_initcall(rcar_pcie_init);
> > > > +#else
> > > > builtin_platform_driver(rcar_pcie_driver);
> > > > +#endif
> > > > diff --git a/drivers/pci/controller/pcie-rcar.h b/drivers/pci/controller/pcie-rcar.h
> > > > index d4c698b5f821..9bb125db85c6 100644
> > > > --- a/drivers/pci/controller/pcie-rcar.h
> > > > +++ b/drivers/pci/controller/pcie-rcar.h
> > > > @@ -85,6 +85,13 @@
> > > > #define LTSMDIS BIT(31)
> > > > #define MACCTLR_INIT_VAL (LTSMDIS | MACCTLR_NFTS_MASK)
> > > > #define PMSR 0x01105c
> > > > +#define L1FAEG BIT(31)
> > > > +#define PMEL1RX BIT(23)
> > > > +#define PMSTATE GENMASK(18, 16)
> > > > +#define PMSTATE_L1 (3 << 16)
> > > > +#define PMCTLR 0x011060
> > > > +#define L1IATN BIT(31)
> > > > +
> > > > #define MACS2R 0x011078
> > > > #define MACCGSPSETR 0x011084
> > > > #define SPCNGRSN BIT(31)
> > > > --
> > > > 2.30.2
> > > >
