Em Thu, 22 Jul 2021 19:06:28 +0530
Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx> escreveu:
> On Wed, Jul 21, 2021 at 10:39:10AM +0200, Mauro Carvalho Chehab wrote:
> > From: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx>
> >
> > Add DTS bindings for the HiKey 970 board's PCIe hardware.
> >
> > Co-developed-by: Mauro Carvalho Chehab <mchehab+huawei@xxxxxxxxxx>
> > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@xxxxxxxxxx>
> > Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@xxxxxxxxxx>
> > ---
> > arch/arm64/boot/dts/hisilicon/hi3670.dtsi | 71 +++++++++++++++++++
> > .../boot/dts/hisilicon/hikey970-pmic.dtsi | 1 -
> > drivers/pci/controller/dwc/pcie-kirin.c | 12 ----
> > 3 files changed, 71 insertions(+), 13 deletions(-)
> >
> > diff --git a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi
> > index 1f228612192c..6dfcfcfeedae 100644
> > --- a/arch/arm64/boot/dts/hisilicon/hi3670.dtsi
> > +++ b/arch/arm64/boot/dts/hisilicon/hi3670.dtsi
> > @@ -177,6 +177,12 @@ sctrl: sctrl@fff0a000 {
> > #clock-cells = <1>;
> > };
> >
> > + pmctrl: pmctrl@fff31000 {
> > + compatible = "hisilicon,hi3670-pmctrl", "syscon";
> > + reg = <0x0 0xfff31000 0x0 0x1000>;
> > + #clock-cells = <1>;
> > + };
> > +
>
> Irrelevant change to this patch.
Huh?
This is used by PCIe PHY, as part of the power on procedures:
+static int hi3670_pcie_noc_power(struct hi3670_pcie_phy *phy, bool enable)
+{
+ struct device *dev = phy->dev;
+ u32 time = 100;
+ unsigned int val = NOC_PW_MASK;
+ int rst;
+
+ if (enable)
+ val = NOC_PW_MASK | NOC_PW_SET_BIT;
+ else
+ val = NOC_PW_MASK;
+ rst = enable ? 1 : 0;
+
+ regmap_write(phy->pmctrl, NOC_POWER_IDLEREQ_1, val);
>
> > iomcu: iomcu@ffd7e000 {
> > compatible = "hisilicon,hi3670-iomcu", "syscon";
> > reg = <0x0 0xffd7e000 0x0 0x1000>;
> > @@ -660,6 +666,71 @@ gpio28: gpio@fff1d000 {
> > clock-names = "apb_pclk";
> > };
> >
>
> [...]
>
> > + #interrupt-cells = <1>;
> > + interrupts = <0 283 4>;
>
> Use the DT flag for interrupts instead of hardcoded value
Do you mean like this?
interrupts = <0 283 IRQ_TYPE_LEVEL_HIGH>;
>
> > + interrupt-names = "msi";
> > + interrupt-map-mask = <0 0 0 7>;
> > + interrupt-map = <0x0 0 0 1
> > + &gic GIC_SPI 282 IRQ_TYPE_LEVEL_HIGH>,
> > + <0x0 0 0 2
> > + &gic GIC_SPI 283 IRQ_TYPE_LEVEL_HIGH>,
> > + <0x0 0 0 3
> > + &gic GIC_SPI 284 IRQ_TYPE_LEVEL_HIGH>,
> > + <0x0 0 0 4
> > + &gic GIC_SPI 285 IRQ_TYPE_LEVEL_HIGH>;
> > + };
> > +
> > /* UFS */
> > ufs: ufs@ff3c0000 {
> > compatible = "hisilicon,hi3670-ufs", "jedec,ufs-2.1";
> > diff --git a/arch/arm64/boot/dts/hisilicon/hikey970-pmic.dtsi b/arch/arm64/boot/dts/hisilicon/hikey970-pmic.dtsi
> > index 48c739eacba0..03452e627641 100644
> > --- a/arch/arm64/boot/dts/hisilicon/hikey970-pmic.dtsi
> > +++ b/arch/arm64/boot/dts/hisilicon/hikey970-pmic.dtsi
> > @@ -73,7 +73,6 @@ ldo33: LDO33 { /* PEX8606 */
> > regulator-name = "ldo33";
> > regulator-min-microvolt = <2500000>;
> > regulator-max-microvolt = <3300000>;
> > - regulator-boot-on;
>
> Again, irrelevant.
I'll move it to the USB patch series, where the PMIC is added.
>
> > };
> >
> > ldo34: LDO34 { /* GPS AUX IN VDD */
> > diff --git a/drivers/pci/controller/dwc/pcie-kirin.c b/drivers/pci/controller/dwc/pcie-kirin.c
> > index bfc0513f7b15..9dad14929538 100644
> > --- a/drivers/pci/controller/dwc/pcie-kirin.c
> > +++ b/drivers/pci/controller/dwc/pcie-kirin.c
> > @@ -347,18 +347,6 @@ static const struct regmap_config pcie_kirin_regmap_conf = {
> > .reg_stride = 4,
> > };
> >
> > -/* Registers in PCIeCTRL */
> > -static inline void kirin_apb_ctrl_writel(struct kirin_pcie *kirin_pcie,
> > - u32 val, u32 reg)
> > -{
> > - writel(val, kirin_pcie->apb_base + reg);
> > -}
> > -
> > -static inline u32 kirin_apb_ctrl_readl(struct kirin_pcie *kirin_pcie, u32 reg)
> > -{
> > - return readl(kirin_pcie->apb_base + reg);
> > -}
> > -
>
> Same here...
This hunk should be on patch 03/10. Probably some rebase added it here by
mistake. I'll fix it on v8.
Thanks,
Mauro
