On Tue, Jul 20, 2021 at 08:11:55PM +0200, Pali Rohár wrote:
> On Tuesday 20 July 2021 11:34:51 Bjorn Helgaas wrote:
> > On Tue, Jul 20, 2021 at 04:49:55PM +0200, Pali Rohár wrote:
> > > On Monday 19 July 2021 18:12:27 Bjorn Helgaas wrote:
> > > > On Fri, Jun 25, 2021 at 12:04:29PM +0100, Lorenzo Pieralisi wrote:
> > > > > On Thu, Jun 24, 2021 at 11:33:44PM +0200, Pali Rohár wrote:
> > > > >
> > > > > [...]
> > > > >
> > > > > > -static void advk_pcie_check_pio_status(struct advk_pcie *pcie)
> > > > > > +static int advk_pcie_check_pio_status(struct advk_pcie *pcie, u32 *val)
> > > > > > {
> > > > > > struct device *dev = &pcie->pdev->dev;
> > > > > > u32 reg;
> > > > > > @@ -472,15 +476,50 @@ static void advk_pcie_check_pio_status(struct advk_pcie *pcie)
> > > > > > status = (reg & PIO_COMPLETION_STATUS_MASK) >>
> > > > > > PIO_COMPLETION_STATUS_SHIFT;
> > > > > >
> > > > > > - if (!status)
> > > > > > - return;
> > > > > > -
> > > > > > + /*
> > > > > > + * According to HW spec, the PIO status check sequence as below:
> > > > > > + * 1) even if COMPLETION_STATUS(bit9:7) indicates successful,
> > > > > > + * it still needs to check Error Status(bit11), only when this bit
> > > > > > + * indicates no error happen, the operation is successful.
> > > > > > + * 2) value Unsupported Request(1) of COMPLETION_STATUS(bit9:7) only
> > > > > > + * means a PIO write error, and for PIO read it is successful with
> > > > > > + * a read value of 0xFFFFFFFF.
> > > > > > + * 3) value Completion Retry Status(CRS) of COMPLETION_STATUS(bit9:7)
> > > > > > + * only means a PIO write error, and for PIO read it is successful
> > > > > > + * with a read value of 0xFFFF0001.
> > > > > > + * 4) value Completer Abort (CA) of COMPLETION_STATUS(bit9:7) means
> > > > > > + * error for both PIO read and PIO write operation.
> > > > > > + * 5) other errors are indicated as 'unknown'.
> > > > > > + */
> > > > > > switch (status) {
> > > > > > + case PIO_COMPLETION_STATUS_OK:
> > > > > > + if (reg & PIO_ERR_STATUS) {
> > > > > > + strcomp_status = "COMP_ERR";
> > > > > > + break;
> > > > > > + }
> > > > > > + /* Get the read result */
> > > > > > + if (val)
> > > > > > + *val = advk_readl(pcie, PIO_RD_DATA);
> > > > > > + /* No error */
> > > > > > + strcomp_status = NULL;
> > > > > > + break;
> > > > > > case PIO_COMPLETION_STATUS_UR:
> > > > > > - strcomp_status = "UR";
> > > > > > + if (val) {
> > > > > > + /* For reading, UR is not an error status */
> > > > > > + *val = CFG_RD_UR_VAL;
> > > >
> > > > I think the comment is incorrect. Unsupported Request *is* an error
> > > > status. But most platforms log it and fabricate ~0 data
> > > > (CFG_RD_UR_VAL) to return to the CPU, and I think that's what you're
> > > > doing here. So I think the code is fine, but the "not an error
> > > > status" comment is wrong.
> > >
> > > Ok, and what we should driver set as return value for pci_ops.read
> > > callback in this case?
> >
> > On most platforms, pci_ops.read() does not check for failure, so it
> > returns PCIBIOS_SUCCESSFUL in this case.
>
> Ok. Most platforms do not check for failure. But it is generally
> correct? Probably more platforms do not provide error flag and only
> return value. But aardvark hw provides this kind error information, so
> should pci-aardvark's pci_ops.read() on error returns PCIBIOS_SUCCESSFUL
> on some other return value?
By all means, if you have the error information handy, return
PCIBIOS_DEVICE_NOT_FOUND or whatever you think is appropriate. Of
course, most callers of pci_read_config_word() et al don't check. I
think you should set the returned data to ~0 in this case, too.
