Hi, Sinan, On Tue, Jun 29, 2021 at 5:19 PM Sinan Kaya <okaya@xxxxxxxxxx> wrote: > > On 6/29/2021 11:55 AM, Huacai Chen wrote: > > he root cause on Loongson platform is that CPU is > > still accessing PCIe devices while poweroff/reboot, and if we disable > > the Bus Master Bit at this time, the PCIe controller doesn't forward > > requests to downstream devices, and also doesn't send TIMEOUT to CPU, > > which causes CPU wait forever (hardware deadlock). This behavior is a > > PCIe protocol violation, and will be fixed in new revisions of hardware > > (add timeout mechanism for CPU read request, whether or not Bus Master > > bit is cleared). > > Your word above says this is a quirk and it needs to be handled as such > in the code rather than impacting all platforms. Yes, this is more or less a quirk, and we have already found the root cause in hardware. However, as I said before, there are other platforms that also have similar problems. Huacai >
