On Thu, Jun 24, 2021 at 06:01:50PM -0500, Bjorn Helgaas wrote: > On Fri, Jun 18, 2021 at 06:04:28PM -0500, Bjorn Helgaas wrote: > > On Fri, Jun 18, 2021 at 05:02:19PM +0100, Jon Hunter wrote: > > > The cppcheck tool issues the following warning for the Tegra194 PCIe > > > driver ... > > > > > > $ cppcheck --enable=all drivers/pci/controller/dwc/pcie-tegra194.c > > > Checking drivers/pci/controller/dwc/pcie-tegra194.c ... > > > > > > drivers/pci/controller/dwc/pcie-tegra194.c:1829:23: portability: > > > Shifting signed 32-bit value by 31 bits is > > > implementation-defined behaviour. See condition at line 1826. > > > [shiftTooManyBitsSigned] > > > > > > appl_writel(pcie, (1 << irq), APPL_MSI_CTRL_1); > > > ^ > > > The above warning occurs because the '1' is treated as a signed type > > > and so fix this by using the 'BIT' macro to ensure that this is defined > > > as a unsigned type. > > > > The subject and commit log should describe the problem we're fixing. > > The *warning* is not the problem; the problem is the undefined > > behavior. I updated the commit log accordingly but I did not change the subject :-/ > > I'll fix this up, no need to repost for this. > > I merged this from Lorenzo's branch, but I updated the commit log like > this because the undefined behavior is the real problem: > > PCI: tegra194: Fix tegra_pcie_ep_raise_msi_irq() ill-defined shift Yep, I forgot to update the subject, thanks for doing that. Lorenzo > > tegra_pcie_ep_raise_msi_irq() shifted a signed 32-bit value left by 31 > bits. The behavior of this is implementation-defined. > > Replace the shift by BIT(), which is well-defined. > > Found by cppcheck: > > $ cppcheck --enable=all drivers/pci/controller/dwc/pcie-tegra194.c > Checking drivers/pci/controller/dwc/pcie-tegra194.c ... > > drivers/pci/controller/dwc/pcie-tegra194.c:1829:23: portability: Shifting signed 32-bit value by 31 bits is implementation-defined behaviour. See condition at line 1826. [shiftTooManyBitsSigned] > > appl_writel(pcie, (1 << irq), APPL_MSI_CTRL_1); > ^ > > [bhelgaas: commit log] > Link: https://lore.kernel.org/r/20210618160219.303092-1-jonathanh@xxxxxxxxxx > Fixes: c57247f940e8 ("PCI: tegra: Add support for PCIe endpoint mode in Tegra194") > Signed-off-by: Jon Hunter <jonathanh@xxxxxxxxxx> > Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@xxxxxxx> > Signed-off-by: Bjorn Helgaas <bhelgaas@xxxxxxxxxx> > > > > Fixes: c57247f940e8 PCI: tegra: Add support for PCIe endpoint mode in Tegra194 > > > Signed-off-by: Jon Hunter <jonathanh@xxxxxxxxxx> > > > --- > > > drivers/pci/controller/dwc/pcie-tegra194.c | 2 +- > > > 1 file changed, 1 insertion(+), 1 deletion(-) > > > > > > diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c > > > index 8fc08336f76e..3c1feeab104f 100644 > > > --- a/drivers/pci/controller/dwc/pcie-tegra194.c > > > +++ b/drivers/pci/controller/dwc/pcie-tegra194.c > > > @@ -1826,7 +1826,7 @@ static int tegra_pcie_ep_raise_msi_irq(struct tegra_pcie_dw *pcie, u16 irq) > > > if (unlikely(irq > 31)) > > > return -EINVAL; > > > > > > - appl_writel(pcie, (1 << irq), APPL_MSI_CTRL_1); > > > + appl_writel(pcie, BIT(irq), APPL_MSI_CTRL_1); > > > > > > return 0; > > > } > > > -- > > > 2.25.1 > > >
