On Wed, 23 Feb 2011 10:08:10 +0000
"Jan Beulich" <JBeulich@xxxxxxxxxx> wrote:
> On various newer Intel systems the PCI bus(ses) the non-core devices
> live on aren't getting announced by ACPI except through the bus range
> covered by mmconfig. At least the i7core-edac driver depends on these
> devices getting detected.
>
> Mauro, could you check whether with this change the Xeon 55xx hack in
> that driver can go away altogether, and with it the bogus exporting of
> pcibios_scan_specific_bus()?
>
> Signed-off-by: Jan Beulich <jbeulich@xxxxxxxxxx>
> Cc: Mauro Carvalho Chehab <mchehab@xxxxxxxxxx>
> Cc: Aristeu Sergio <arozansk@xxxxxxxxxx>
>
> ---
> arch/x86/pci/mmconfig-shared.c | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> --- 2.6.38-rc6/arch/x86/pci/mmconfig-shared.c
> +++ 2.6.38-rc6-x86-mmconfig-last-bus/arch/x86/pci/mmconfig-shared.c
> @@ -606,6 +606,16 @@ static void __init __pci_mmcfg_init(int
> if (list_empty(&pci_mmcfg_list))
> return;
>
> + if (pcibios_last_bus < 0) {
> + const struct pci_mmcfg_region *cfg;
> +
> + list_for_each_entry(cfg, &pci_mmcfg_list, list) {
> + if (cfg->segment)
> + break;
> + pcibios_last_bus = cfg->end_bus;
> + }
> + }
> +
> if (pci_mmcfg_arch_init())
> pci_probe = (pci_probe & ~PCI_PROBE_MASK) |
> PCI_PROBE_MMCONF; else {
I never got the info I was looking for internally; we'll give this a
try this cycle and see how well it works.
Thanks,
Jesse
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