Some host bridges advertise non-prefetable memory windows that are
entirely located below 4GB but are marked as 64-bit address memory.
Since commit 9d57e61bf723 ("of/pci: Add IORESOURCE_MEM_64 to resource
flags for 64-bit memory addresses"), the OF PCI range parser takes a
stricter view and treats 64-bit address ranges as advertised while
before such ranges were treated as 32-bit.
A PCI host bridge that is modelled as PCI-to-PCI bridge cannot forward
64-bit non-prefetchable memory ranges. As a result, the change in
behaviour due to the commit causes allocation failure for devices that
require non-prefetchable bus addresses.
In order to not break platforms, override the 64-bit flag for
non-prefetchable memory ranges that lie entirely below 4GB.
Suggested-by: Ard Biesheuvel <ardb@xxxxxxxxxx>
Link: https://lore.kernel.org/r/7a1e2ebc-f7d8-8431-d844-41a9c36a8911@xxxxxxx
Signed-off-by: Punit Agrawal <punitagrawal@xxxxxxxxx>
Cc: Bjorn Helgaas <bhelgaas@xxxxxxxxxx>
Cc: Rob Herring <robh+dt@xxxxxxxxxx>
Signed-off-by: Punit Agrawal <punitagrawal@xxxxxxxxx>
---
drivers/pci/of.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/pci/of.c b/drivers/pci/of.c
index da5b414d585a..e2e64c5c55cb 100644
--- a/drivers/pci/of.c
+++ b/drivers/pci/of.c
@@ -346,6 +346,14 @@ static int devm_of_pci_get_host_bridge_resources(struct device *dev,
dev_warn(dev, "More than one I/O resource converted for %pOF. CPU base address for old range lost!\n",
dev_node);
*io_base = range.cpu_addr;
+ } else if (resource_type(res) == IORESOURCE_MEM) {
+ if (!(res->flags & IORESOURCE_PREFETCH)) {
+ if (res->flags & IORESOURCE_MEM_64)
+ if (!upper_32_bits(range.pci_addr + range.size - 1)) {
+ dev_warn(dev, "Clearing 64-bit flag for non-prefetchable memory below 4GB\n");
+ res->flags &= ~IORESOURCE_MEM_64;
+ }
+ }
}
pci_add_resource_offset(resources, res, res->start - range.pci_addr);
--
2.30.2
