On Wed, May 26, 2021 at 7:34 PM Ray Jui <ray.jui@xxxxxxxxxxxx> wrote: > > > Here's the thing. All Broadcom ARMv8 based SoCs have migrated to use > either gicv2m or gicv3-its for MSI/MSIX support. The platforms that > still use iProc event queue based MSI are only legacy ARMv7 based > platforms. Out of them: > > NSP - dual core > Cygnus - single core > HR2 - single core > > So based on this, it seems to me that it still makes sense to allow > multi-msi to be supported on single core platforms, and Sandor's company > seems to need such support in their particular use case. Sandor, can you > confirm? Right - we are using it in production on legacy ARMv7 SOCs. > > > Thanks. This makes sense. And it looks like this can be addressed > separately from the above issue. I'll have to allocate time to work on > this. In addition, I'd also need someone else with the NSP dual-core > platform to test it for me since we don't have these legacy platforms in > our office anymore. > I will be able to test patches on the XGS Katana2 SOC - which is dual core.
