Hi Qi, I love your patch! Yet something to improve: [auto build test ERROR on linus/master] [also build test ERROR on v5.13-rc3 next-20210525] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch] url: https://github.com/0day-ci/linux/commits/Qi-Liu/drivers-perf-hisi-Add-support-for-PCIe-PMU/20210525-204754 base: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git a050a6d2b7e80ca52b2f4141eaf3420d201b72b3 config: xtensa-allyesconfig (attached as .config) compiler: xtensa-linux-gcc (GCC) 9.3.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/0day-ci/linux/commit/ff87ea71fee69c1ffacd6c8cec2d0eae5641b244 git remote add linux-review https://github.com/0day-ci/linux git fetch --no-tags linux-review Qi-Liu/drivers-perf-hisi-Add-support-for-PCIe-PMU/20210525-204754 git checkout ff87ea71fee69c1ffacd6c8cec2d0eae5641b244 # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=xtensa If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp@xxxxxxxxx> All errors (new ones prefixed by >>): drivers/perf/pci/hisilicon/hisi_pcie_pmu.c: In function 'hisi_pcie_pmu_readq': >> drivers/perf/pci/hisilicon/hisi_pcie_pmu.c:210:9: error: implicit declaration of function 'readq'; did you mean 'readl'? [-Werror=implicit-function-declaration] 210 | return readq(pcie_pmu->base + offset); | ^~~~~ | readl drivers/perf/pci/hisilicon/hisi_pcie_pmu.c: In function 'hisi_pcie_pmu_writeq': >> drivers/perf/pci/hisilicon/hisi_pcie_pmu.c:218:2: error: implicit declaration of function 'writeq'; did you mean 'writel'? [-Werror=implicit-function-declaration] 218 | writeq(val, pcie_pmu->base + offset); | ^~~~~~ | writel cc1: some warnings being treated as errors vim +210 drivers/perf/pci/hisilicon/hisi_pcie_pmu.c 204 205 static u64 hisi_pcie_pmu_readq(struct hisi_pcie_pmu *pcie_pmu, u32 reg_offset, 206 u32 idx) 207 { 208 u32 offset = hisi_pcie_pmu_get_offset(reg_offset, idx); 209 > 210 return readq(pcie_pmu->base + offset); 211 } 212 213 static void hisi_pcie_pmu_writeq(struct hisi_pcie_pmu *pcie_pmu, u32 reg_offset, 214 u32 idx, u64 val) 215 { 216 u32 offset = hisi_pcie_pmu_get_offset(reg_offset, idx); 217 > 218 writeq(val, pcie_pmu->base + offset); 219 } 220 --- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@xxxxxxxxxxxx
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