Add ipq6018 qmp phy device for the single PCIe serdes lane on IPQ60xx
SoCs.
Reviewed-by: Rob Herring <robh@xxxxxxxxxx>
Signed-off-by: Baruch Siach <baruch@xxxxxxxxxx>
---
.../devicetree/bindings/phy/qcom,qmp-phy.yaml | 25 +++++++++++++++++++
1 file changed, 25 insertions(+)
diff --git a/Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml
index 626447fee092..cb2eb7ac6d28 100644
--- a/Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml
@@ -17,6 +17,7 @@ description:
properties:
compatible:
enum:
+ - qcom,ipq6018-qmp-pcie-phy
- qcom,ipq8074-qmp-pcie-phy
- qcom,ipq8074-qmp-usb3-phy
- qcom,msm8996-qmp-pcie-phy
@@ -294,6 +295,30 @@ allOf:
items:
- const: phy
- const: common
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,ipq6018-qmp-pcie-phy
+ then:
+ properties:
+ clocks:
+ items:
+ - description: Phy aux clock.
+ - description: Phy config clock.
+ clock-names:
+ items:
+ - const: aux
+ - const: cfg_ahb
+ resets:
+ items:
+ - description: reset of phy block.
+ - description: phy common block reset.
+ reset-names:
+ items:
+ - const: phy
+ - const: common
- if:
properties:
compatible:
--
2.30.2
