I have an ltr branch in my pci-2.6 repo on kernel.org that contains simple enable/disable functions for latency tolerance reporting, optimized buffer flush/fill and ID-based ordering. These are PCIe 2.1 ECNs and are part of the new PCIe 3.0 spec. If anyone has hardware that supports any of these features, I'd appreciate testing feedback. ID-based ordering should allow for improved performance, OBFF should improve power consumption by performing CPU and memory transactions only when they're already active, and LTR should improve power management as well. There are several other features we don't yet support, but I'd also be interested in getting feedback about, in particular atomic ops and transaction processing hints. If anyone has endpoint hardware supporting these features I'd be very interested in working with you to add support for them to the PCI core. Thanks, -- Jesse Barnes, Intel Open Source Technology Center -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
