On Mon, 10 Jan 2011 13:08:37 -0800
Seth Heasley <seth.heasley@xxxxxxxxx> wrote:
> This patch adds the LPC Controller DeviceIDs for the Intel DH89xxCC PCH.
>
> The code for capturing ranges of LPC Controller DeviceIDs has also been updated.
>
> Signed-off-by: Seth Heasley <seth.heasley@xxxxxxxxx>
>
> --- linux-2.6.37/include/linux/pci_ids.h.orig 2011-01-04 16:50:19.000000000 -0800
> +++ linux-2.6.37/include/linux/pci_ids.h 2011-01-10 11:23:19.000000000 -0800
> @@ -2469,6 +2469,9 @@
> #define PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MAX 0x1c5f
> #define PCI_DEVICE_ID_INTEL_PATSBURG_SMBUS 0x1d22
> #define PCI_DEVICE_ID_INTEL_PATSBURG_LPC 0x1d40
> +#define PCI_DEVICE_ID_INTEL_DH89XXCC_LPC_MIN 0x2310
> +#define PCI_DEVICE_ID_INTEL_DH89XXCC_LPC_MAX 0x231f
> +#define PCI_DEVICE_ID_INTEL_DH89XXCC_SMBUS 0x2330
> #define PCI_DEVICE_ID_INTEL_82801AA_0 0x2410
> #define PCI_DEVICE_ID_INTEL_82801AA_1 0x2411
> #define PCI_DEVICE_ID_INTEL_82801AA_3 0x2413
> --- linux-2.6.37/arch/x86/pci/irq.c.orig 2011-01-04 16:50:19.000000000 -0800
> +++ linux-2.6.37/arch/x86/pci/irq.c 2011-01-10 11:31:02.000000000 -0800
> @@ -596,21 +596,18 @@
> return 1;
> }
>
> - if ((device >= PCI_DEVICE_ID_INTEL_5_3400_SERIES_LPC_MIN) &&
> - (device <= PCI_DEVICE_ID_INTEL_5_3400_SERIES_LPC_MAX)) {
> + if ((device >= PCI_DEVICE_ID_INTEL_5_3400_SERIES_LPC_MIN &&
> + device <= PCI_DEVICE_ID_INTEL_5_3400_SERIES_LPC_MAX)
> + || (device >= PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MIN &&
> + device <= PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MAX)
> + || (device >= PCI_DEVICE_ID_INTEL_DH89XXCC_LPC_MIN &&
> + device <= PCI_DEVICE_ID_INTEL_DH89XXCC_LPC_MAX)) {
> r->name = "PIIX/ICH";
> r->get = pirq_piix_get;
> r->set = pirq_piix_set;
> return 1;
> }
>
> - if ((device >= PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MIN) &&
> - (device <= PCI_DEVICE_ID_INTEL_COUGARPOINT_LPC_MAX)) {
> - r->name = "PIIX/ICH";
> - r->get = pirq_piix_get;
> - r->set = pirq_piix_set;
> - return 1;
> - }
> return 0;
> }
Applied to linux-next, thanks.
It would be cool if you could figure out a way to avoid having to
continually send these sorts of patches for new chipsets as they come
out. Maybe for stuff newer than a certain date we can just assume PIIX
style interfaces? Or maybe there's a way to refactor this even more
cleanly?
Thanks,
--
Jesse Barnes, Intel Open Source Technology Center
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