Hi Keith,
> On Dec 17, 2020, at 9:14 AM, Keith Busch <kbusch@xxxxxxxxxx> wrote:
>
> The pci_dev parameter given to aer_root_reset() may be a downstream port
> rather than the root port. Get the root port from the provided device in
> order to clear the root's aer status, and update the message to indicate
> which type of port was actually reset.
>
> Signed-off-by: Keith Busch <kbusch@xxxxxxxxxx>
> ---
> drivers/pci/pcie/aer.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c
> index 77b0f2c45bc0..b2b0e9eb5cfb 100644
> --- a/drivers/pci/pcie/aer.c
> +++ b/drivers/pci/pcie/aer.c
> @@ -1388,7 +1388,7 @@ static pci_ers_result_t aer_root_reset(struct pci_dev *dev)
> if (type == PCI_EXP_TYPE_RC_END)
> root = dev->rcec;
> else
> - root = dev;
> + root = pcie_find_root_port(dev);
This is a good sanity check on the dev being passed. This also reminds me to take a look at pcie_do_recovery() in terms of clarity with the two devices of interest being handled.
Acked-by: Sean V Kelley <sean.v.kelley@xxxxxxxxx>
>
> /*
> * If the platform retained control of AER, an RCiEP may not have
> @@ -1414,7 +1414,8 @@ static pci_ers_result_t aer_root_reset(struct pci_dev *dev)
> }
> } else {
> rc = pci_bus_error_reset(dev);
> - pci_info(dev, "Root Port link has been reset (%d)\n", rc);
> + pci_info(dev, "%s Port link has been reset (%d)\n", rc,
Perhaps … "%s%s Port
> + pci_is_root_bus(dev->bus) ? "Root" : "Downstream");
> }
>
> if ((host->native_aer || pcie_ports_native) && aer) {
> --
> 2.24.1
>
