On 12/8/20 11:18 AM, Lorenzo Pieralisi wrote:
[...]
I suppose a fault on multiple cores can happen simultaneously, if it
does this may not work well either - I assume all config/io/mem would
trigger a fault.
As I mentioned in my reply to v1, is there a chance we can move
this quirk into config accessors (if the PM_ENTER_L1_DLLP is
subsequent to a write into PMCSR to programme a D state) ?
I don't think we can, since the userspace can do such a config space write
with e.g. setpci and then this fixup is still needed.
Userspace goes via the kernel config accessors anyway, right ?
As far as I can tell, you can just write the register with devmem, so
no. You cannot assume everything will go through the accessors. I don't
think setpci does either.
I would like to avoid having arch specific hooks in PCI drivers so
if we can work around it somehow it is much better.
I think we had this discussion before, which ultimately led to hiding
the workaround in ATF on Gen3. On Gen2, there is no ATF, so the work
around must be in Linux.
I can still merge this patch this week but I would like to explore
alternatives before committing it.
Please merge it as-is.
