On Tue, 2020-11-17 at 10:53 +0100, Thomas Gleixner wrote: > But that does not solve the problem either simply because then the IOMMU > will catch the rogue MSIs and you get an interrupt storm on the IOMMU > error interrupt. Not if you can tell the IOMMU to stop reporting those errors. We can easily do it per-device for DMA errors; not quite sure what granularity we have for interrupts. Perhaps the Intel IOMMU only lets you set the Fault Processing Disable bit per IRTE entry, and you still get faults for Compatibility Format interrupts? Not sure about AMD...
Attachment:
smime.p7s
Description: S/MIME cryptographic signature
