On Mon, Nov 02, 2020 at 10:41:37AM -0600, Nishanth Menon wrote:
> On 15:41-20201102, Kishon Vijay Abraham I wrote:
> > PCIe controller in J721E supports a maximum of 32 outbound regions.
> > commit 4e5833884f66 ("arm64: dts: ti: k3-j721e-main: Add PCIe device tree
> > nodes") incorrectly added maximum number of outbound regions to 16. Fix
> > it here.
> >
> > Fixes: 4e5833884f66 ("arm64: dts: ti: k3-j721e-main: Add PCIe device tree nodes")
> > Signed-off-by: Kishon Vijay Abraham I <kishon@xxxxxx>
> > ---
> > arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 8 ++++----
> > 1 file changed, 4 insertions(+), 4 deletions(-)
> >
> > diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
> > index e2a96b2c423c..61b533130ed1 100644
> > --- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
> > +++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
> > @@ -652,7 +652,7 @@
> > power-domains = <&k3_pds 239 TI_SCI_PD_EXCLUSIVE>;
> > clocks = <&k3_clks 239 1>;
> > clock-names = "fck";
> > - cdns,max-outbound-regions = <16>;
> > + cdns,max-outbound-regions = <32>;
Can this be made detectable instead? Write to region registers and check
the write sticks? I'm doing this for the DWC controller.
Or make the property optional with the default being the max (32).
Rob
