This series has two patches. Patch-1: Adds a public API to query if the system has ECRC policty turned on. Patch-2: DesignWare core PCIe IP has a TLP Digest (TD) override bit in one of its control registers of ATU. This bit needs to be programmed for proper ECRC functionality. This is currently identified as an issue with DesignWare IP version 4.90a. DWC code queries the PCIe sub-system through the API added in Patch-1 to find out if ECRC is turned on or not and configures ATU accordingly. V3: * Addressed Ethan Zhao's comments for patch-1 V2: * Addressed Jingoo's review comments Vidya Sagar (2): PCI/AER: Add pcie_is_ecrc_enabled() API PCI: dwc: Add support to configure for ECRC drivers/pci/controller/dwc/pcie-designware.c | 8 ++++++-- drivers/pci/controller/dwc/pcie-designware.h | 1 + drivers/pci/pci.h | 2 ++ drivers/pci/pcie/aer.c | 11 +++++++++++ 4 files changed, 20 insertions(+), 2 deletions(-) -- 2.17.1
