Re: PCI, isolcpus, and irq affinity

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On Mon, 2020-10-12 at 21:31 +0200, Thomas Gleixner wrote:
> > In this case could disk I/O submitted by one of those CPUs end up 
> > interrupting another one?
> 
> On older kernels, yes.
> 
> X86 enforces effective single CPU affinity for interrupts since v4.15.

Is that here to stay? Because it means that sending external interrupts
in logical mode is kind of pointless, and we might as well do this...

--- a/arch/x86/kernel/apic/x2apic_cluster.c
+++ b/arch/x86/kernel/apic/x2apic_cluster.c
@@ -187,3 +187,3 @@ static struct apic apic_x2apic_cluster __ro_after_init = {
        .irq_delivery_mode              = dest_Fixed,
-       .irq_dest_mode                  = 1, /* logical */
+       .irq_dest_mode                  = 0, /* physical */
 
@@ -205,3 +205,3 @@ static struct apic apic_x2apic_cluster __ro_after_init = {
 
-       .calc_dest_apicid               = x2apic_calc_apicid,
+       .calc_dest_apicid               = apic_default_calc_apicid,
 

And then a bunch of things which currently set x2apic_phys just because
of *external* IRQ limitations, no longer have to, and can still benefit
from multicast of IPIs to whole clusters at a time.

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