On 06/14/2010 06:49 PM, Bjorn Helgaas wrote: >> >> Invisible PCI bridges have been known to occur in pure PCI space, too. > > Are you talking about PCI host bridges that don't appear in PCI config > space? I suppose those could be described as "invisible," but since > host bridges aren't architected and their primary interface isn't PCI, > it seems only natural that we'd discover them by a non-PCI mechanism. > They're invisible in PCI terms, but obviously perfectly discoverable > and configurable via ACPI. I mean invisible PCI-PCI bridges. Yes, they exist. > If you ask me, it's weird that most x86 chipsets put PCI host bridge > configuration in PCI config space -- it may be convenient in some ways, > but still architecturally strange. It is only strange because they are non-bridge devices. PCI-Express fixes that to some degree with the whole "root complex" notion, but really a PCI host bridge should have been a bridge device from the start. > I suppose one could argue that there's a non-standard P2P bridge > from bus 00 to bus 80, but I can't imagine anybody doing that. Ah, ye of little imagination. > An OS would have to have vendor-specific code just to do PCI > resource management, and that really misses the point of PCI. This really misses the point of HT... > It seems more likely to me that one of the VIA host bridges leads > to bus 80. PCI host bridges are not architected, so if this bridge > lives on HT chain 00, and we can think of HT as "not quite PCI," > then it seems natural that the host bridge would be VIA-specific, > just like it was in pre-HT days. I think the best word for it is "incompetent braindamage", but that's just me... -hpa -- H. Peter Anvin, Intel Open Source Technology Center I work for Intel. I don't speak on their behalf. -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
