Re: [PATCH v2] PCI: read memory ranges out of Broadcom CNB20LE host bridge

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On Tue, 18 May 2010 15:58:31 -0700
"Ira W. Snyder" <iws@xxxxxxxxxxxxxxxx> wrote:

> On Tue, May 18, 2010 at 03:15:04PM -0700, Jesse Barnes wrote:
> > On Thu, 1 Apr 2010 11:43:30 -0700
> > "Ira W. Snyder" <iws@xxxxxxxxxxxxxxxx> wrote:
> > 
> > > Read the memory ranges behind the Broadcom CNB20LE host bridge out of the
> > > hardware. This allows PCI hotplugging to work, since we know which memory
> > > range to allocate PCI BAR's from.
> > > 
> > > The x86 PCI code automatically prefers the ACPI _CRS information when it is
> > > available. In that case, this information is not used.
> > > 
> > > Signed-off-by: Ira W. Snyder <iws@xxxxxxxxxxxxxxxx>
> > > ---
> > 
> > You can't just use _CRS data?  If this duplicates _CRS functionality
> > and doesn't fix any cases where _CRS data is broken, I'm inclined not
> > to include it...
> > 
> 
> Both types of board I own with this chipset are quite old and do not
> have ACPI at all, so there is no _CRS data. If a board with this chipset
> exists and it has ACPI support, this code will automatically be skipped
> in favor of the _CRS data.

Ah ok, missed that part of the thread.  Will apply.

Thanks,
-- 
Jesse Barnes, Intel Open Source Technology Center
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