Re: [PATCH] x86: Reserve legacy VGA MMIO area for x86_64 as well as x86_32

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On 04/09/2010 03:44 PM, H. Peter Anvin wrote:
> On 04/09/2010 03:35 PM, Andy Isaacson wrote:
>> [    2.267740] pci 0000:00:1f.2: BAR 5: assigned [mem 0x000a0000-0x000a07ff]
>> [    2.274701] pci 0000:00:1f.2: BAR 5: set to [mem 0x000a0000-0x000a07ff] (PCI address [0xa0000-0xa07ff]
> 
> Looks like this is something the kernel is assigning to it.  It *does*
> get marked reserved:
> 
>> [    0.000000]   #6 [000009ec00 - 00000f0000]   BIOS reserved
> 
> ... but that doesn't seem to keep the PCI code from assigning anything
> there.  This is a Very Bad thing in general... if we're assigning
> devices to areas marked reserved, we have a huge problem.

_CRS report those range are used devices under the peer root bus.

and in e820_reserve_resources_late, we are using insert_resource_expand_to_fit()
to register E820_RESERVED region.

could be that insert_resource_expand_to_fit doesn't work in that case.

like in the tree when we have
[    0.704003] pci_root PNP0A03:00: host bridge window [mem 0x000a0000-0x000bffff]
[    0.705002] pci_root PNP0A03:00: host bridge window [mem 0x000c0000-0x000effff]
[    0.706002] pci_root PNP0A03:00: host bridge window [mem 0x000f0000-0x000fffff]

and then insert_resource...
[0x9fec00, 0x100000)

it is not inserted to tree properly

YH
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