On Fri, 12 Mar 2010, Yinghai Lu wrote:
On 03/12/2010 01:30 PM, Justin Piszcz wrote:
On Fri, 12 Mar 2010, Justin Piszcz wrote:
On Fri, 12 Mar 2010, Justin Piszcz wrote:
# Disable Bootmem code (NO_BOOTMEM) [Y/n/?] (NEW)
I see this new option ^
Ok, booting 2.6.34-rc1:
[ 0.132248] PCI: pci_cache_line_size set to 64 bytes
[ 0.132248] pci 0000:00:00.0: BAR 3: reserving [mem
0xe0000000-0xffffffff flags 0x120204] (d=0, p=0)
[ 0.132248] pci 0000:00:00.0: no compatible bridge window for [mem
0xe0000000-0xffffffff 64bit]
[ 0.132248] pci 0000:00:00.0: can't reserve [mem
0xe0000000-0xffffffff 64bit]
Full dmesg:
http://home.comcast.net/~jpiszcz/20100312/dmesg-2.6.34-rc1.txt
[ 0.097651] node 0 link 0: io port [b000, ffff]
[ 0.097654] TOM: 0000000040000000 aka 1024M
[ 0.097657] Fam 10h mmconf [e0000000, e00fffff]
[ 0.097659] node 0 link 0: mmio [a0000, bffff]
[ 0.097661] node 0 link 0: mmio [40000000, dfffffff]
[ 0.097663] node 0 link 0: mmio [f0000000, fe02ffff]
[ 0.097665] node 0 link 0: mmio [e0000000, e04fffff] ==> [e0100000, e04fffff]
[ 0.097668] bus: [00, 04] on node 0 link 0
[ 0.097670] bus: 00 index 0 [io 0x0000-0xffff]
[ 0.097672] bus: 00 index 1 [mem 0x000a0000-0x000bffff]
[ 0.097674] bus: 00 index 2 [mem 0x40000000-0xdfffffff]
[ 0.097676] bus: 00 index 3 [mem 0xe0500000-0xffffffff]
[ 0.097677] bus: 00 index 4 [mem 0xe0100000-0xe04fffff]
that looks like setting MMCONFIG through ATI chipset.
and cpu northbridge set 1M for accessing 1M...
BIOS really should only use northbridge MSR to set that to cover bus [0, 255]
and just disable the ATI pci 00:00.0 BAR3
Ok, so the BIOS is broken, is there a pci= option to workaround this in
the interim, or does a quirk need to be implemented?
Justin.
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