I noticed there's some kind of formatting problem with the new Virtual Channel decoding. I'm using an embedded system with a PLX 8532 PCIe switch, which supports virtual channels. I'm attaching the hex (lspci -xxxx) and formatted output (lspci -vv) to this e-mail showing the device in question. Forgive me if this turns out to be due to my quite old libc level (as discussed in my problem with 64-bit formatting in 3/2009). John -----Original Message----- From: linux-pci-owner@xxxxxxxxxxxxxxx [mailto:linux-pci-owner@xxxxxxxxxxxxxxx] On Behalf Of Martin Mares Sent: Saturday, January 23, 2010 7:07 PM To: Linux-PCI Mailing List Subject: pciutils-3.1.6 released Hello, world! The pciutils-3.1.6 have been released shortly after 3.1.5, featuring the following minor features: * More capabilities decoded: Virtual Channel (except arbitration tables), Root Complex Link, Vendor-Specific (header only), SATA HBA. * All extended capabilities have their version displayed (-vv or more). Have a nice fortnight -- Martin `MJ' Mares <mj@xxxxxx> http://mj.ucw.cz/ Faculty of Math and Physics, Charles University, Prague, Czech Rep., Earth A professor is one who talks in someone else's sleep. -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
./lspci -xxxxs12:08 0000:12:08.0 Class 0604: Device 10b5:8532 (rev bc) 00: b5 10 32 85 07 00 10 00 bc 00 04 06 00 00 01 00 10: 00 00 00 00 00 00 00 00 12 16 16 00 01 01 00 00 20: 60 80 60 80 b1 80 b1 80 00 00 00 00 00 00 00 00 30: 00 00 00 00 40 00 00 00 00 00 00 00 00 01 00 00 40: 01 48 01 c8 00 00 00 00 05 68 80 00 00 00 00 00 50: 00 00 00 00 00 00 00 00 ff ff ff ff ff ff ff ff 60: ff ff ff ff ff ff ff ff 10 00 61 01 01 00 00 00 70: 2f 00 0a 00 41 dc 02 08 40 00 41 10 e2 0c 40 00 80: fa 01 40 00 ff ff ff ff ff ff ff ff ff ff ff ff 90: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff a0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff b0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff c0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff d0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff e0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff f0: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff 100: 03 00 41 fb df 0e 00 00 01 00 00 00 ff ff ff ff 110: ff ff ff ff ff ff ff ff ff ff ff ff ff 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./lspci -vvs12:08 0000:12:08.0 Class 0604: Device 10b5:8532 (rev bc) Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx- Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx- Latency: 0 Bus: primary=12, secondary=16, subordinate=16, sec-latency=0 I/O behind bridge: 00000000-00000fff Memory behind bridge: 80600000-806fffff Prefetchable memory behind bridge: 0000000080b00000-0000000080bfffff Secondary status: 66MHz- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- <SERR- <PERR- BridgeCtl: Parity- SERR- NoISA- VGA- MAbort- >Reset- FastB2B- PriDiscTmr- SecDiscTmr- DiscTmrStat- DiscTmrSERREn- Capabilities: [40] Power Management version 1 Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold+) Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME- Capabilities: [48] MSI: Enable- Count=1/1 Maskable- 64bit+ Address: 0000000000000000 Data: 0000 Capabilities: [68] Express (v1) Downstream Port (Slot+), MSI 00 DevCap: MaxPayload 256 bytes, PhantFunc 0, Latency L0s <64ns, L1 <1us ExtTag- RBE- FLReset- DevCtl: Report errors: Correctable+ Non-Fatal+ Fatal+ Unsupported+ RlxdOrd- ExtTag- PhantFunc- AuxPwr- NoSnoop- MaxPayload 256 bytes, MaxReadReq 128 bytes DevSta: CorrErr- UncorrErr+ FatalErr- UnsuppReq+ AuxPwr- TransPend- LnkCap: Port #8, Speed 2.5GT/s, Width x4, ASPM L0s L1, Latency L0 <2us, L1 <32us ClockPM- Surprise- LLActRep- BwNot- LnkCtl: ASPM Disabled; Disabled- Retrain- CommClk+ ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt- LnkSta: Speed 2.5GT/s, Width x4, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt- SltCap: AttnBtn- PwrCtrl+ MRL- AttnInd- PwrInd- HotPlug+ Surprise+ Slot # 8, PowerLimit 25.000000; Interlock- NoCompl- SltCtl: Enable: AttnBtn- PwrFlt+ MRL- PresDet+ CmdCplt+ HPIrq+ LinkChg- Control: AttnInd Off, PwrInd On, Power- Interlock- SltSta: Status: AttnBtn- PowerFlt- MRL- CmdCplt- PresDet+ Interlock- Changed: MRL- PresDet- LinkState- Capabilities: [100 v1] Device Serial Number 00-00-00-01-00-00-0e-df Capabilities: [fb4 v1] Advanced Error Reporting UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq+ ACSViol- UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol- UESvrt: DLP+ SDES- TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol- CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr- CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr- AERCap: First Error Pointer: 1f, GenCap+ CGenEn- ChkCap+ ChkEn- Capabilities: [138 v1] Power Budgeting <?> Capabilities: [148 v1] Virtual Channel Caps: LPEVC=0 RefClk=100ns PATEntrySize=0 Arb: Fixed+ WRR32+ WRR64- WRR128- 100ns- - ,ÿMTÿLÄÿL´ÿKÿÿMDÿM4ÿMTÿJøÿJ¤ÿ?ÄÿI$ÿH`ÿGäÿED%08x (%s-bit, %sprefetchable) - ÿLÄÿL´ÿKÿÿMDÿM4ÿMTÿJøÿJ¤ÿ?ÄÿI$ÿH`ÿGäÿED%08x (%s-bit, %sprefetchable) - TableOffset=7 Ctrl: ArbSelect=Fixed Status: InProgress- Port Arbitration Table <?> VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256- Fixed- RR32- Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=ff Status: NegoPending- InProgress- VC1: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans- Arb: Fixed+ WRR32- WRR64- WRR128- TWRR128- WRR256- Fixed- RR32- Ctrl: Enable- ID=1 ArbSelect=Fixed TC/VC=00 Status: NegoPending- InProgress- Kernel driver in use: pcieport-driver