Re: [PATCH] pci: read-modify-write of the pcie device control register when initiating pcie flr

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On Thu, 3 Dec 2009 22:27:51 +0200
"Shmulik Ravid" <shmulikr@xxxxxxxxxxxx> wrote:

> The pcie_flr routine writes the device control register with the FLR
> bit set clearing all other fields for the FLR duration. Among other
> fields, the Max_Payload_Size is also cleared which can cause errors
> if there are transactions lurking in the HW pipeline. The patch
> replaces the blank write with read-modify-write of the control
> register keeping the other fields intact.
> 
> Signed-off-by: Shmulik Ravid <shmulikr@xxxxxxxxxxxx>
> ---
> diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
> index 4e4c295..45266e1 100644
> --- a/drivers/pci/pci.c
> +++ b/drivers/pci/pci.c
> @@ -2099,7 +2099,7 @@ static int pcie_flr(struct pci_dev *dev, int
> probe) int i;
>  	int pos;
>  	u32 cap;
> -	u16 status;
> +	u16 status, control;
>  
>  	pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
>  	if (!pos)
> @@ -2126,8 +2126,10 @@ static int pcie_flr(struct pci_dev *dev, int
> probe) "proceeding with reset anyway\n");
>  
>  clear:
> -	pci_write_config_word(dev, pos + PCI_EXP_DEVCTL,
> -				PCI_EXP_DEVCTL_BCR_FLR);
> +	pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &control);
> +	control |= PCI_EXP_DEVCTL_BCR_FLR;
> +	pci_write_config_word(dev, pos + PCI_EXP_DEVCTL, control);
> +
>  	msleep(100);
>  
>  	return 0;

Applied, thanks.

-- 
Jesse Barnes, Intel Open Source Technology Center
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