Yinghai Lu wrote:
> Bjorn Helgaas wrote:
>> On Tuesday 01 December 2009 12:03:57 am Yinghai Lu wrote:
>>> Alex found one system that one pci bridge pref mmio 64 is not set correctly.
>>> aka, the upper32 base/limit is not cleaned.
>>> he found that bridge is supporting 64 bit pref mmio, but device under that
>>> does not support that. so that IORESOURCE_MEM_64 get cleared in pbus_size_mem()
>> I think it's wrong that pbus_size_mem() fiddles with IORESOURCE_MEM_64
>> in bus resources based on where BARs of devices on that bus live. That
>> feels fragile.
>
> yes. need more clean up.
other than we should store PCI_PREF_RANGE_TYPE_64, and use it in pci_setup_bridge
others should be ok.
for pcie hot plug, the bridge IORESOURCE_MEM_64 could be set, and MMIO > 4g, and later when plug one device doesn't
support 64bit mmio pref, and
pci_bus_alloc_resource(struct pci_bus *bus, struct resource *res,
resource_size_t size, resource_size_t align,
resource_size_t min, unsigned int type_mask,
void (*alignf)(void *, struct resource *, resource_size_t,
resource_size_t),
void *alignf_data)
{
int i, ret = -ENOMEM;
resource_size_t max = -1;
type_mask |= IORESOURCE_IO | IORESOURCE_MEM;
/* don't allocate too high if the pref mem doesn't support 64bit*/
if (!(res->flags & IORESOURCE_MEM_64))
max = PCIBIOS_MAX_MEM_32;
will make sure that allocation will fail.
so it will get range freom mmio non pref range. or fail there again.
then we will release the bridge pref mmio...
YH
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