Re: [PATCH 0/4] PCI: improve messages for debuggability

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On Wednesday 04 November 2009 12:51:39 pm Yinghai Lu wrote:
> On Wed, Nov 4, 2009 at 11:31 AM, Bjorn Helgaas <bjorn.helgaas@xxxxxx> wrote:
> > On Wednesday 04 November 2009 10:44:35 am Matthew Wilcox wrote:
> >> On Wed, Nov 04, 2009 at 10:32:37AM -0700, Bjorn Helgaas wrote:
> >> > This series doesn't change any behavior; it just makes our messages
> >> > about PCI resource management a little more consistent and complete.
> >>
> >> Could you give a before-and-after sample subset of dmesg?  This looks
> >> good, on its face, I just want to see examples.
> >
> > Sure.  In the normal case, it's not terribly interesting -- I added some
> > bridge discovery information and ROM BAR assignment messages, as in the
> > HP DL380G6 diff below.  It's more interesting when we find problems.  I'll
> > try to dig up an example of that, too.
> >
> > --- dl380g6a.old        2009-11-04 12:21:34.000000000 -0700
> > +++ dl380g6a.new        2009-11-04 12:22:11.000000000 -0700
> > @@ -324,8 +324,18 @@
> >  pci 0000:04:00.0: supports D1
> >  pci 0000:04:00.0: PME# supported from D0
> >  pci 0000:04:00.0: PME# disabled
> > +pci 0000:00:01.0: PCI bridge to [bus 04-04]
> >  pci 0000:00:01.0:   bridge window [io  0x4000-0x4fff]
> >  pci 0000:00:01.0:   bridge window [mem 0xfbb00000-0xfbffffff]
> > +pci 0000:00:02.0: PCI bridge to [bus 05-05]
> > +pci 0000:00:03.0: PCI bridge to [bus 10-12]
> > +pci 0000:00:04.0: PCI bridge to [bus 13-13]
> > +pci 0000:00:05.0: PCI bridge to [bus 14-16]
> > +pci 0000:00:06.0: PCI bridge to [bus 17-19]
> > +pci 0000:00:07.0: PCI bridge to [bus 0d-0f]
> > +pci 0000:00:08.0: PCI bridge to [bus 0a-0c]
> > +pci 0000:00:09.0: PCI bridge to [bus 07-09]
> > +pci 0000:00:0a.0: PCI bridge to [bus 06-06]
> >  pci 0000:02:00.0: reg 10: [mem 0xf4000000-0xf5ffffff 64bit]
> >  pci 0000:02:00.0: reg 30: [mem 0x00000000-0x0000ffff pref]
> >  pci 0000:02:00.0: PME# supported from D0 D3hot D3cold
> > @@ -334,6 +344,7 @@
> >  pci 0000:02:00.1: reg 30: [mem 0x00000000-0x0000ffff pref]
> >  pci 0000:02:00.1: PME# supported from D0 D3hot D3cold
> >  pci 0000:02:00.1: PME# disabled
> > +pci 0000:00:1c.0: PCI bridge to [bus 02-02]
> >  pci 0000:00:1c.0:   bridge window [mem 0xf2000000-0xf5ffffff]
> 
> maybe you can change to
> pci 0000:00:1c.0:   bridge window [bus 02-02]

If you mean that you prefer this:

  pci 0000:00:1c.0:   bridge window [bus 02-02]
  pci 0000:00:1c.0:   bridge window [mem 0xf2000000-0xf5ffffff]

instead of this:

  pci 0000:00:1c.0: PCI bridge to [bus 02-02]
  pci 0000:00:1c.0:   bridge window [mem 0xf2000000-0xf5ffffff]

I disagree because the bus number range is not like the MMIO and
I/O port apertures.  The bus range is effectively a qualifier on
ALL the apertures of the bridge; it's not separate from them.

I can imagine doing something like this:

  pci 0000:00:01.0: bridge window [io  0x4000-0x4fff] to [bus 04-04]
  pci 0000:00:01.0: bridge window [mem 0xfbb00000-0xfbffffff] to [bus 04-04]

That has the advantage that each line is self-contained, so you don't
need the preceeding "PCI bridge" line to make sense out of it.  I
wouldn't be opposed to that, but I don't know if there's enough
advantage to make it worth changing.

I don't want to get rid of the "PCI bridge" line completely, though,
at least for subtractive-decode bridges.

Bjorn
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