Well, I still didn't test it with newer kernel versions, but basically - do u say that cardbus device really doesn't support 64-bit (this is what I thought, and what I saw from the specs I read)? Do u have any idea, which kernel version, shouldn't have this bug anymore? -----Original Message----- From: Jesse Barnes [mailto:jbarnes@xxxxxxxxxxxxxxxx] Sent: Thursday, October 29, 2009 18:51 PM To: Barak Fargoun Cc: linux-pci@xxxxxxxxxxxxxxx Subject: Re: Question regarding cardbus memory windows addresses above 4GB On Thu, 29 Oct 2009 06:55:34 -0400 "Barak Fargoun" <barak@xxxxxxxxxxxx> wrote: > I have a machine with 4GB RAM (a Dell e6400 model), and i am > experiencing a very strange thing: the memory windows of the cardbus > bridge, are located (as reported by 'cat /proc/iomem') at addresses > which are above 4GB (e.g.: 0x120000000). > The strange things in this are: > > 1. I didn't saw in the cardbus spec (well, at least not in the one I > have) - that it's possible for the cardbus bridge to have memory > windows, which are more than 32 bit. > 2. 'lspci' on the cardbus device, fails to identify the correct memory > windows of the cardbus device, and reports only the 32-bit portion of > those addresses (e.g.: 0x20000000, instead of 0x120000000) > 3. When I took a look at the cardbus setup code inside the Linux > kernel, I saw that the code which setups the memory windows of the > device, is writing only 32-bit for the memory window (dword), and > therefore, I can't understand, how can he use 64-bit address, while > writing only 32-bit address. > > Can someone please help me with this? Does the behavior change with different kernel versions? We did have some bugs awhile back that would cause allocations in 64 bit space for devices that didn't support it... -- Jesse Barnes, Intel Open Source Technology Center -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
