Eric W. Biederman wrote: > Yinghai Lu <yinghai@xxxxxxxxxx> writes: >> after closing look up the code, it looks it will not break your setup. >> >> 1. before the patches: >> a. when master card is inserted, all bridge in that card will get assigned with min_size >> b. when new cards is inserted to those slots in master card, will get assigned in the bridge size. >> >> 2. after the patches: v5 >> a. booted up, all leaf bridge mmio get clearred. >> b. when master card is inserted, all bridge in that card will get assigned with min_size, and master bridge will be sum of them >> c. when new cards is inserted to those slots in master card, will get assigned in the bridge size. >> >> can you check those two patches in your setup to verify it? > > I have a much simpler case I will break, as I tried something similar by accident. which kernel version? > > AMD cpu MCP55 with one pcie port setup as hotplug. > The system only has 2GB of RAM. So plenty of space for pcie devices. one or two ht chains? do you still have lspci -tv with it? > > If the firmware assigns nothing and linux at boot time assigns the pci mmio space: > Reads from the bar of the hotplugged device work > Writes to the bar of the hotplugged device, cause further writes to go to lala land. > > So I had to have the firmware make the assignment, because only it knows the > details of the hidden AMD bar registers for each hypertransport chain etc. that mean kernel doesn't get peer root bus res probed properly YH -- To unsubscribe from this list: send the line "unsubscribe linux-pci" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
