Re: [PATCH 0/2] PM / PCMCIA: Fix CardBus suspend/resume regression

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On Thu, 8 Oct 2009 00:30:00 +0200
"Rafael J. Wysocki" <rjw@xxxxxxx> wrote:

> Hi,
> 
> Sorry for the delayed response.
> 
> On Saturday 26 September 2009, you wrote:
> > Everytime I try to email linux-pci from my google account it does
> > not appear to work, basically I was wondering if
> > 
> > I have a acer aspire 9815 with from what I have read a 32bit
> > Northbridge and when you add 4GB of RAM with a nVidia 256 of
> > "virtual ram" causes a base address registers (BAR1), but works
> > fine with 2GB because there is a problem with the way that Linux
> > kernel is allocating the memory associated with the devices and
> > places then out of range.
> > 
> > Here is my lspci for the PCI host bridge
> > 
> > Host bridge: Intel Corporation Mobile 945GM/PM/GMS, 943/940GML and
> > 945GT Express Memory Controller Hub (rev 03)
> > PCI bridge: Intel Corporation Mobile 945GM/PM/GMS, 943/940GML and
> > 945GT Express PCI Express Root Port (rev 03)
> > 
> > From this website it appears that some one was trying to update the
> > PCI IOMEM part of the kernl
> > 
> > http://tjworld.net/wiki/Linux/PCIDynamicResourceAllocationManagement
> > 
> > but says that it will be in the .30 / .31 kernel but I am not able
> > to still use the 4GB of ram and I am using the  2.6.31-10-generic
> > #35-Ubuntu SMP Tue Sep 22 17:33:42 UTC 2009 i686 GNU/Linux from a
> > kubuntu 9.10 setup and was hoping to have the fix already applied.
> > 
> > Was wondering since I am using the k/ubuntu kernel does the "real"
> > kernel have the PCI IOMEM Upgrade ? or do I have pass some kernel
> > parameters on grub to allow for this to work correctly ? or has
> > there been another upgrade to the PCI structure that will come in a
> > later release ?
> 
> I really cannot answer this question, but I'm adding CCs to linux-pci
> and Jesse, who maintains the kernel's PCI subsystem.

Unfortunately, TJ disappeared after pointing us at his page and his
initial work, so the kernel still doesn't have sophisticated
reallocation support for the most part.

> > Also there was some advice to update the BIOS for some laptops and
> > set the upper memory limit, does this make the PC memory have a
> > virtual head to it and thus the OS will not see the rest of RAM ?
> > or is it just for the PCI setup aspects that look at the upper
> > memory limit and the rest of the OS can see the and use the rest of
> > the RAM ?
> > 
> > Any advice would be great.

Some BIOSes provide an option to allocate BARs above the 4G boundary.
Some people have had luck doing it manually as well, and a quirk is
always a possibility.

-- 
Jesse Barnes, Intel Open Source Technology Center
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